The DMA driver of stm32 used to use `stm32_dma_enable_fifo()`,
which is located in dma_stm32_v1.c to set DMDIS bit, enable
interrupt generation and set FIFO threshold. Now since FIFO
threshold is initialized with `stm32_dma_get_fifo_threshold()`
and interrupt generation is also configured in dma_stm32.c, this
function will only have one job, to configure FIFO mode.
We can add FIFO mode operation in dma_stm32.c directly and
remove it from dma_stm32_v1.c.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
When using the EWIF it is a good idea to clear it before enabling the
watchdog. Otherwise, the watchdog callback will be called upon watchdog
enable if EWIF is enabled. This patch fixes this case.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.
Also replace some
config
prompt "foo"
bool/int
with the more common shorthand
config
bool/int "foo"
See the 'Style recommendations and shorthands' section in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
After switching to nrfx 2.0.0, the Kconfig choice options that allowed
enabling of pull-up or pull-down for MISO lines in SPIs and SPIMs are
not properly supported, they are simply ignored. This commit restores
the possibility of applying pull configuration for MISO lines.
In earlier nrfx versions, the MISO pull configuration could be only
set globally, in nrfx_config files, for all SPI and SPIM instances
together. Since nrfx 2.0.0, this configuration can be applied per
instance. This commit takes advantage of this possibility and instead
of using a common Kconfig option as a global setting for all instances,
allows applying individual instance settings via devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previously, if a control transfer had data, it would be unhandled and
left in the usbip socket to be interpreted as the next usbip packet,
leading to explosions.
Signed-off-by: Josh Gao <josh@jmgao.dev>
This is a follow-up to commit 84f8235005.
Default initialization to 0 of the .dcx_pin field in the extended part
of the SPIM configuration is incorrect, because this means that pin 0
should be used as the D/CX line. For the SPIM instance that provides
the extended functionality, this results in undesired assignment of
the pin 0, and for the other SPIM instances, this causes that their
initialization fails with the NRFX_ERROR_NOT_SUPPORTED code.
This commit sets this field to NRFX_SPIM_PIN_NOT_USED, to indicate that
the D/CX line is not supposed to be used.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
By default all events are processed through bt_recv, which results
in lost events and subsys/bluetooth/hci_core.c:hci_event function
assertions fail to pass
Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com>
According to the context information, the processing of
net_buf_add_u8 within the get_evt_buf function is
redundant and incorrect.
Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com>
Commit 5a9a33b0cf changes interrupt
destination in an attempt to broadcast interrupts. However, this
change causes interrupts to stop working on the UP Squared board
in non-SMP configuration. According to QEMU source code,
physical destination address 0xFF000000 is a special case where
it broadcasts the interrupts. However, none of the IOAPIC
documentation (that I can find) describes this behavior. So,
revert that commit.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Seems to be fine to temporarly cast to int there as frequencies are in
Mhz and not Ghz.
Fixes#20497
Coverity CID: 205638
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fill the `rx_delay` field in the SPIM configuration structure only when
the RXDELAY feature is present in a given SPIM instance, to prevent
compilation errors when some other SPIM instance is enabled together
with SPIM3.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When setting a timeout measure the number of accumulated unannounced
ticks. If this value exceeds half the 24-bit cycle counter range
force an announcement so the unannounced cycles are incorporated into
the system tick counter.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When both buffer and max data to read are zero return
the available data in buffer.
Fixes#20838
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When using the RC clock source a periodic calibration is invoked that
involves reading from the die temperature sensor. The code did not
protect against execution order that caused the periodic calibration
to be invoked before the temperature sensor was initialized.
Update the temperature sensor to detect that it has not been
initialized and so should reject attempts to fetch a reading.
Update the calibration code to do nothing when temperature reading
fails.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
z_vrfy_flash_get_page_count defined as a function prototype in place of
a real function due to a stray semicolon.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Coverity discovered that a logical AND was used in place of
a bit-wise AND. So fix it.
Fixes#20489
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixed handling of HCI events in the HCI driver over RPMsg. Now,
the driver makes use of discardable buffer pool when allocating
memory for certain HCI event types (e.g. Advertising Report Event).
Applications that are flooded with Advertising Reports will run
much better after this change (e.g. Mesh applications).
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Fix an issue discovered by Coverity where there is a potential
out of bound access on the divisor arrays.
Fixes#20495Fixes#20496
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some early tickless drivers had a common pattern where they would
compute a tick maximum for the request (i.e. the maximum the hardware
counter can handle) but apply it only on the input tick value and not
on the adjusted final value, opening up the overflow condition it was
supposed to have prevented.
Fixes#20939 (Strictly it fixes the specific pattern that was
discovered in that bug. It's not impossible that other drivers with
alternative implementations have a similar issue, though they look OK
to me via a quick audit).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
event_index must be lower than NRFX_IPC_ID_MAX_VALUE.
As of now, maximum index is 16.
Fixes#20962, #20964, #20967
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Similar to what we do in other timer drivers, the maximum ticks
supplied in z_clock_set_timeout(..) needs to be MAX_TICKS at
maximum, when K_FOREVER is supplied as argument to the function.
In addition to that, the value we load onto the SysTick LOAD
register shall be truncated to MAX_CYCLES. This is required
to prevent loading a trash value to LOAD register, as only
the lowest 24 bits may be safely written.
Finally, we move the enforcement of the minimum delay to be
programmed on LOAD (i.e. MIN_DELAY) at the end step of the
calculation of the cycles-to-be-programmed. This prevents
from misscalculating the delay, as any required adjustment
is applied at the end, after the delay is rounded up to
the next tick boundary.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When setting a timeout measure the number of accumulated unannounced
ticks. If this value exceeds half the 32-bit cycle counter range
force an announcement so the unannounced cycles are incorporated into
the system tick counter.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The commit fixes the update of the absolute counter of HW cycles
in the SysTick ISR for TICKLESS mode.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The previous solution depended on a magic number and was inefficient
(entered the second-wrap conditional even when a second wrap hadn't
been observed). Replace with an algorithm that is deterministic.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add detailed documentation for the internal 'elapsed()'
function, as well as for the local counter variables used
in the SysTick driver.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Unsupported bits of the Current Value Register
are read as zero, so we remove the redundant
ANDing with the max supported counter value.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The original code assumed that limiting the tick count to the maximum
cycle value representable without wrapping would guarantee that adding
the resulting cycle offset to last_count would not lap the counter.
This is not true when elapsed time, which is also added to the cycle
offset, exceeds one tick. Cap the maximum offset at the number of
cycles corresponding to the maximum number of ticks without wrapping.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add clearing error event to UART and UARTE drivers.
Without it driver goes into infinite interrupt loop.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
So fare all nRF flash memories had flash base address at 0.
nRF flash driver was implemented in such way that it
really used absolute addresses, while convention are relative
addresses (for flash_map as well), which was not visible as start
address offset was 0.
It will become visible on nRF53 which has networking flash
with non-zero base address.
This patch switch nRF flash driver to use relative addresses for flash.
UICR absolute addressing is kept.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add the possibility to compile out the PS/2 driver if
the application is not using the KBC 8042 peripheral. This
helps to remove warnings for unused PS/2 isr function
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Initial implementation of the keyboard controller peripheral
in the eSPI driver. This allows to communicate ps2 and kscan
data between EC and Host
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
The HCI transport implemented by an application using the HCI raw
interface may have its own buffer headroom requirements. Currently the
available headroom gets completely determined by the selected HCI
driver. E.g. most of the time this is the native controller driver
which doesn't reserve any headroom at all.
To cover for the needs of HCI raw users, add a new Kconfig variable
for the apps to set to whatever they need. Correspondingly, use the
maximum of the HCI driver and HCI raw headroom requirements for the
buffer pool definitions and the headroom initializations.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
When pass NULL to spi_transceive with user space enabled, stack buffer
is still passed to spi driver and it will cause kinds of problems like
MPU fault, so change it to pass relevant NULL pointers in the actual
transceive call.
Fixes: #20811.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable SWO debug output during system initialization and not as part of
GPIO driver initialization. After the modification the logger output
becomes available earlier during the boot process. Also, it's not
necessary anymore to build full GPIO driver only to enable SWO. This may
be critical when building small images.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The init macro used outdated spellings for the instance-specific
properties, resulting in build warnings when I2C was enabled.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This patch tests the return code when calling clock_control_get_rate
and completes the issue #20503 seen on watchdog
[Coverity CID :205655]
Fixes#20503
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch tests the return code when calling clock_control_get_rate
and completes the issue #20503 seen on watchdog
[Coverity CID :205655]
Fixes#20503
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch tests the return code when calling clock_control_get_rate
and completes the issue #20503 seen on watchdog
[Coverity CID :205655]
Fixes#20503
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch tests the return code when calling clock_control_get_rate
and completes the issue #20503 seen on watchdog
[Coverity CID :205655]
Fixes#20503
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Use LOG_DBG instead of LOG_ERR when BME680 chip is detected
and its ID verified successfully.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
The i2c_msg API details do not work correctly with Nordic TWI. Switch
to the higher-level and simpler API for register read and write. Also
add a tree configuration on a Nordic-based board.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
There is possibility that endrx interrupt will be triggered in the
middle of timer interrupt responsible for UARTE timeout, this
patch handles this case.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
LSM303AGR is a special one in terms of raw value scale among all devices
supported by lis2dh.c driver. Apply proper scale factor based on
sensitivity scale provided in LIS2DH and LSM303AGR datasheets.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All values were scaled by 8 instead of 12 for 16g compile-time selected
range. This resulted with values around 6.5 m/s^2. Scaling for runtime
configurable ranges was broken for all except 2g range option due to
totally broken lis2dh_range_to_reg_val().
Fix wrong scaling for 16g compile-time and all runtime selectable ranges
by reworking code that scales raw value. While doing this, change
lis2dh->scale type from 16 to 32 bits. This allows to slightly increase
final result precision by using the fact that raw values have maximum 12
bits precision, allowing us to multiply lis2dh->scale by (1 << 4)
compared to previous implementation.
Fix bug #19872.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
According to struct sensor_value documentation, val2 should be negative
for negative result. So drop code that tries to make val2 positive.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
* fix the smp timer dirver bugs found in debug and test.
for smp case, GFRC is used as clock source, and local
internal timer is used to trigger time event.
* because 64-bits gfrc is used, so idle can be igored as no kernel
tick will be missed
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Up to now interrupts could be only configured once, with no way to
disable them in runtime.
Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.
The improvement over previously reverted patch [1] is that we disable
interrupts only when we configure port for which interrupt line was
previously selected. This for example prevents to disable interrupts
line 2 in case PA2 was previously configured as interrupt source, but we
are currently configuring PB2 as output.
[1] 0951ce2d34 ("gpio: stm32: support disabling and reenabling
interrupts on pin")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This patch doesn't change functionality, but is only related to improved
readability and reusability.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With dual core handling introduction, we now need to take care to
always release lock before exiting function.
Rework gpio_stm32_config to take this into account.
Additionally, since ENOSYS usage is resevred to system calls
handling, replace with EIO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
By adding new SoC to Zephyr drivers has to be updated.
Commit affects:
- USB driver
- support for nRF52833 added.
- support for USB_DEVICE_REMOTE_WAKEUP in hid-mouse added.
- SPI
- IEEE 802.15.4
- CLOCK CONTROL
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Cast to (void) the lsm6dso_mem_bank_set() calls as we
are not interested to the return value.
Coverity-CID: 205625
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The translation to encoded multi-level interrupts failed to account
for the GPIO interrupt number being encoded in at bit position 8,
and being offset by 1 in the base encoding.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The I2C peripheral should be configured using the CPU clock frequency
and not the system clock frequency. This used to be fine because they
were the same before #19232, but now that the system clock is
RTC-based (which has a different frequency), we can no longer make
that assumption.
Fixes#20480
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The smallest region that can be erashed is one sector, so setting
SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=2048 will fail at runtime when the
flash page API is used to erase a single (or misaligned) page. Add a
compile-time check that the requested layout page size is erasable.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add internal API to enter and exit deep power-down mode. Add Kconfig
option to return to DPD whenever device is not active.
When device power management becomes more mature it should be possible
to implement it, which would allow use of DPD without having to enter
and exit DPD between consecutive transactions.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Convert the LOCK/UNLOCK macros to acquire/release functions in
preparation for extending those steps to include power management.
Also commit to always allocating a semophore, and use a more clean
way of conditionalizing the operations.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit converts the existing hcm5883l 3-axis magnetometer
driver to use device tree for the I2C and GPIO selection.
It also adds a basic sample application for this sensor, using the
frdm-k64f development board to demonstrate how the interrupt
GPIO pin and I2C bus can be selected.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
Specific SW defined BLE LL parameters need to be set
if the user enables it on this platform. As such, conditionally
enable them directly into the defconfig.
INTMUX CH2 and CH3 are not available to be used if BT support
is enabled on Vega, because they are used internally by the
BLE SW LL
Signed-off-by: David Leach <david.leach@nxp.com>
Don't use use the RV32M1 TRNG as a random source since it can
be quite slow. Instead, use the software implemented xoroshiro
RNG.
Signed-off-by: David Leach <david.leach@nxp.com>
Update calls to nrfx HAL functions to reflect API changes introduced in
nrfx 2.0.0. All these functions are now called with the first parameter
pointing to the structure of registers of the relevant peripheral.
Also a few functions got renamed:
- nrf_gpiote_int_is_enabled to nrf_gpiote_int_enable_check
- nrf_gpiote_event_is_set to nrf_gpiote_event_check
- nrf_rng_event_get to nrf_rng_event_check
- nrf_rng_int_get to nrf_rng_int_enable_check
- nrf_rtc_event_pending to nrf_rtc_event_check
- nrf_rtc_int_is_enabled to nrf_rtc_int_enable_check
- nrf_timer_cc_read to nrf_timer_cc_get
- nrf_timer_cc_write to nrf_timer_cc_set
Default configuration values were removed from nrfx_config files,
so the drivers pwm_nrfx and spi_nrfx_spis no longer can use those.
Function nrfx_pwm_init() now takes one more parameter - context pointer
that is passed to the event handler, not used in the pwm_nrfx driver.
HALs for UART and UARTE now allow configuration of the parity type
and the number of stop bits, for SoCs that provide the corresponding
registers.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the driver to support multiple watchdog instances
and add the corresponding Kconfig options.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert bmg160 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert bmm150 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert max44009 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert mcp9808 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sx9500 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert tmp112 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert th02 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Mark the old time conversion APIs deprecated, leave compatibility
macros in place, and replace all usage with the new API.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.
This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The SPI peripheral should be configured using the CPU clock speed and
not the system clock speed. This used to be fine because they were the
same before #19232, but now that the system clock is RTC-based (which
has a different frequency), we can no longer make that assumption.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Add driver for emulating an EEPROM device using the native POSIX
board. The EEPROM is backed by a binary file in the host file system.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update the I2C slave EEPROM driver to match the new atmel,at24 device
tree binding, where the size of the EEPROM is specified in bytes.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add API for accessing Electrically Erasable Programmable Read-Only
Memory (EEPROM) devices.
EEPROMs have an erase block size of 1 byte, a long lifetime, and allows
overwriting data on byte-by-byte access.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Several macros were documented as deprecated but lacked the
infrastructure to produce deprecation warnings. Add the deprecation
marker, and fix the in-tree references to the deprecated spellings.
Note that one non-deprecated macro should have been deprecated, and
is, referring to a newly added line control bit.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Previously it was not possible to change the PWM period, even if only
a single channel was in use, without first stopping the peripheral,
i.e. setting pulse cycles for the channel to 0. This patch corrects
this behavior.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Set the network interface up / down according to link status.
This means that we call Ethernet carrier on/off function in
proper places.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
SAMD5x/SAME5x header files do not provide this define anymore.
On SAMD2x it was 0, this is still valid.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
The watchdog peripheral on SAME5x/SAMD5x MCUs is very simmilar
to the one found on the SAMD2x parts with only a few register
names changed.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
The SAME5x/SAMD5x MCUs share their SERCOM peripherals with the
samd2x and saml1x MCUs with only few registers changed.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.
The refactoring strategy used in this commit is detailed in the issue
This commit introduces the following major changes:
1. Establish a clear boundary between private and public headers by
removing "kernel/include" and "arch/*/include" from the global
include paths. Ideally, only kernel/ and arch/*/ source files should
reference the headers in these directories. If these headers must be
used by a component, these include paths shall be manually added to
the CMakeLists.txt file of the component. This is intended to
discourage applications from including private kernel and arch
headers either knowingly and unknowingly.
- kernel/include/ (PRIVATE)
This directory contains the private headers that provide private
kernel definitions which should not be visible outside the kernel
and arch source code. All public kernel definitions must be added
to an appropriate header located under include/.
- arch/*/include/ (PRIVATE)
This directory contains the private headers that provide private
architecture-specific definitions which should not be visible
outside the arch and kernel source code. All public architecture-
specific definitions must be added to an appropriate header located
under include/arch/*/.
- include/ AND include/sys/ (PUBLIC)
This directory contains the public headers that provide public
kernel definitions which can be referenced by both kernel and
application code.
- include/arch/*/ (PUBLIC)
This directory contains the public headers that provide public
architecture-specific definitions which can be referenced by both
kernel and application code.
2. Split arch_interface.h into "kernel-to-arch interface" and "public
arch interface" divisions.
- kernel/include/kernel_arch_interface.h
* provides private "kernel-to-arch interface" definition.
* includes arch/*/include/kernel_arch_func.h to ensure that the
interface function implementations are always available.
* includes sys/arch_interface.h so that public arch interface
definitions are automatically included when including this file.
- arch/*/include/kernel_arch_func.h
* provides architecture-specific "kernel-to-arch interface"
implementation.
* only the functions that will be used in kernel and arch source
files are defined here.
- include/sys/arch_interface.h
* provides "public arch interface" definition.
* includes include/arch/arch_inlines.h to ensure that the
architecture-specific public inline interface function
implementations are always available.
- include/arch/arch_inlines.h
* includes architecture-specific arch_inlines.h in
include/arch/*/arch_inline.h.
- include/arch/*/arch_inline.h
* provides architecture-specific "public arch interface" inline
function implementation.
* supersedes include/sys/arch_inline.h.
3. Refactor kernel and the existing architecture implementations.
- Remove circular dependency of kernel and arch headers. The
following general rules should be observed:
* Never include any private headers from public headers
* Never include kernel_internal.h in kernel_arch_data.h
* Always include kernel_arch_data.h from kernel_arch_func.h
* Never include kernel.h from kernel_struct.h either directly or
indirectly. Only add the kernel structures that must be referenced
from public arch headers in this file.
- Relocate syscall_handler.h to include/ so it can be used in the
public code. This is necessary because many user-mode public codes
reference the functions defined in this header.
- Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
necessary to provide architecture-specific thread definition for
'struct k_thread' in kernel.h.
- Remove any private header dependencies from public headers using
the following methods:
* If dependency is not required, simply omit
* If dependency is required,
- Relocate a portion of the required dependencies from the
private header to an appropriate public header OR
- Relocate the required private header to make it public.
This commit supersedes #20047, addresses #19666, and fixes#3056.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
When loading the TX buffer via SPI only transfer the data bytes of
the CAN message that will be used as defined by the DLC.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
This commit limits the data length code to eight.
DLC > 8 returns a newly introduced CAN_TX_EINVAL error code.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Now that all watchdog drivers support DTS we can move setting of
HAS_DTS_WDT to the global watchdog symbol instead of per driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace CONFIG_WDT_0_NAME with DT_ALIAS_WATCHDOG_0_LABEL in samples and
test code. Now that all drivers are DT aware we don't ever set the
Kconfig option.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move from CONFIG_WDT_0_NAME to DT_INST_0_NXP_KINETIS_WDOG_LABEL as the
way we get the name. Doing this so we can remove CONFIG_WDT_0_NAME
usage.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_0_ARM_CMSDK_WATCHDOG_LABEL instead of
CONFIG_WDT_0_NAME. This requires we introduce a "label" property in all
the related dts files. Also introduce a standard watchdog alias
('watchdog0') that can be utilized by sample/test code in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update lis3mdl-magn dts binding to include GPIO interrupt pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
`block_count` in `dma_cfg` is described as how many bytes to be
transfered in dma.h. So it should be 2 since the source data size
and dest data size are all 16 bits in this application. And all
block size should represent just bytes.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
the old DMA driver used to use 1 to stand for 16 bits, while the
new driver uses 2 to stand for 16 bits, which means the
'source_data_size' and the 'dest_data_size' should be 2.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.
Notice due to some bugs, this is currently not working with f7.
There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.
Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.
This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.
Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.
This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
This commit moves DMA parameters previously hard coded in the driver
to the dts.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
src_addr_increment, dst_addr_increment, fifo_threshold and priority
are missing as parameters for configuring DMA. This commit adds them
to the driver.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
The i2s driver assumes the tx channel and rx channel of dma are using
the same dma controller. This commit changes it to be able to use
different dma controllers.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Declaration code for the I2S devices in the driver has too much
duplicate code. This commit uses a help macro to save some work
and some lines of code.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Update ccs811 dts binding to include GPIO pins for wakeup, reset, and
interrupt and change driver code to get the GPIO pin and controller
info from DT instead of Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some stm32f4 1MB SoCs support optional Dual Bank configuration.
This is not yet supported by stm32f4 driver, so report an
error when configuration is detected
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On 2MB parts, on sector 12 and above SNB is offset by 4.
Fixes#20016
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The LIS2MDL supports SPI half duplex mode with a single data line
by default (3-wire), but it might configured to switch to standard
full duplex mode (4-wire).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add shell commands for setting PWM period and duty cycle (in cycles,
microseconds, or nanoseconds).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update vl53l0x dts binding to include GPIO XSHUT pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
