Commit Graph

89 Commits

Author SHA1 Message Date
Fabiola Kwasowiec
02e4e60f2f dmic: add the correct gain values to the dmic registers
Zephyr increments the gain until it reaches the maximum value and
then sets the registers to zero which is incorrect.
The values set in the DMIC config should be restored.

Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
2023-09-28 09:34:44 +02:00
Fabio Baltieri
1ddabfa8d8 dai: intel: dmic: fix shadow variable
Fix a shadow variable build error:

dmic_nhlt.c: In function 'dai_dmic_write_coeff':
dmic_nhlt.c:57:78: error: declaration of 'base' shadows a global
declaration [-Werror=shadow]

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-04 19:35:56 -04:00
Adrian Warecki
b26921d776 dai: intel: dmic: New functions for writing fir coefficients
Created set of new functions for configure fir coefficients with support
for packed format. This allowed to make the dai_dmic_set_config_nhlt
function simpler.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
cba9ec10c3 dai: intel: tgl: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
c28e8ba9ba dai: intel: dmic: Add pdm_base and pdm_idx variables in blob parser
More verbose variable pdm_idx was used instead of n. The series of
references to the array of pdm base addresses has been replaced with
a pdm_base variable.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
2452aaad50 dai: intel: dmic: Separate fir configuration code into function
All fir filters have an identical set of registers so their definitions
were combined to simplify the code. From the dai_dmic_set_config_nhlt
function, a duplicate piece of code responsible for configuring fir was
separated into a new function.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
f74fd8edaf dai: intel: ace: dmic: Add dai_dmic_start_fifo_packers function
Created dai_dmic_start_fifo_packers function corresponding to an already
existing dai_dmic_stop_fifo_packers.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
76d03e798f dai: intel: ace: dmic: Using the WAIT_FOR macro in waiting functions
The while loop in the code fragments waiting for a bit to be cleared has
been replaced with the WAIT_FOR macro call. Added a warning in the case of
timeout.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
3fbaed4de9 dai: intel: ace: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
d7672af838 dai: intel: dmic: Combine PDM registers definitions
All PDM controllers have the same set of registers. Their definitions have
been merged to simplify the code.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
8ea53d49b6 dai: intel: dmic: nhlt: Move debug print code to a separate functions
Moved code fragments responsible for logging and verification of the
configuration register values from the dai_dmic_set_config_nhlt function to
a separate functions. Behavior of the code verifying the correctness of
register values has been changed so that it only displays warnings.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Adrian Warecki
81944c5c62 dai: intel: dmic: Move definitions of nhlt structures to a new file
Definitions of a configuration blob structures were separated from the main
drivers header file and moved to a dedicated file to improve code
readability. Removed unnecessary nhlt_pdm_fir_coeffs structure.
The nhlt_pdm_ctrl_cfg structure was extended with nhlt_pdm_ctrl_fir_cfg
and fir coefficients.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-09-04 15:30:00 -04:00
Kai Vehmanen
f764e7e737 drivers: dai: alh: fix refcount logic for ALH ownership
Refcounting is used to track ALH block usage and to
call alh_claim_ownership()/alh_release_ownership() accordingly.
This is however incorrectly done on ALH instance basis, which
means when one instance is released, ownership can be released
even though one ALH instance is still active.

Fix the logic by tracking ALH usage as a global property
which matches the alh_claim_ownership/alh_release_ownership
semantics.

Link: https://github.com/thesofproject/sof/issues/7759
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-23 10:04:00 +02:00
Daniel Leung
caf6490d53 dai: rename shadow variables
Renames shadow variables found by -Wshadow.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Fabio Baltieri
15a2cb5a2f drivers: intel: ssp: delay initialization after dma
The SSP driver depends on DMA as there are references in the devicetree,
but it currently initialize before the DMA driver itself. This is
exposed by the build time priority checking
(CONFIG_CHECK_INIT_PRIORITIES=y) and shows up as:

ERROR: /soc/ssp@77a00 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77800 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77600 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
...

Bumping up the SSP priority so the initialization is in sync with the
devicetree node hirearchy.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-18 10:45:37 +00:00
Anas Nashif
7584c17374 intel_adsp: restructure dmic headers and move regs to soc
The ifdefs in in dmic headers is getting out of control and makes
maintainence very ddifficult, especially when having to maintain out of
tree SoCs sharing the same data and information.

Keep header clean and per SoC and share some common registers in one
place instead avoiding confusion and making it easier to read and
maintain.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-06-23 14:27:44 -04:00
Adrian Warecki
d13dfb9d23 dmic: Allow use of reserved bits in CIC_CONTROL register
Since the mtl platform, the stereo bit has been removed from the
CIC_CONTROL register and now it is marked as reserved. On some platforms
(mtl and above), the configuration blob still has this bit set, causing the
dmic driver to report an error. This commit changes the behavior of the
driver to only display a warning.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-06-21 13:56:16 -04:00
Jaska Uimonen
c022f41c1e drivers: dai: intel: dmic: fix irq argument cast
The argument to the dmic irq is of type "struct device *" and dmic data
is actually part of it, thus make the cast correctly.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-06-21 16:06:44 +02:00
Adrian Warecki
2958a407f8 adsp: dmic: Add source clock selection support
The dmic driver has been expanded to support different clock sources.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-06-20 14:19:13 -04:00
Adrian Warecki
0ee6452816 adsp: ace: dmic: Add missing registers definitions
Added definitions with description of missing registers for ace platforms.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-06-20 14:19:13 -04:00
Adrian Warecki
fbb55d1d5e adsp: dmic: Moved registers definitions to a separate file
Moved dmic register definitions to a separate file dmic_regs.h and added
their description. Platform-dependent registers definitions are placed in
separate files. Used standard macros FIELD_PREP, FIELD_GET in operations on
registers.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-06-20 14:19:13 -04:00
Kai Vehmanen
aa5b66be5f intel_adsp: cavs25: configure access to ALH
For Intel cavs2.5, access from LPGPDMAC to Audio Link Hub
RX/TX registers needs to be explicitly enabled before use.

The logic follow hardware initialization done in
SOF project sof/src/platform/intel/cavs/platform.c

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-05-30 10:50:02 -04:00
Kai Vehmanen
e59e65dc75 drivers: dai: ssp: fix power-up flow for Intel cAVS platforms
A recent commit broke the power-up sequences for other Intel
platforms.

Fixes: 1e5550d262 ("intel_adsp: ace20_lnl: ssp: Program new HW registers")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-04-21 14:02:02 -04:00
Kai Vehmanen
6403c9414b drivers: dai: intel: dmic: fix dmic power-up on cAVS2.5 and ACE1.5
The logic to poll on CPA bit is not working on non-ACE2.0
platforms. This is causing regressions in SOF test suite with
dmic.

Fixes: 2547948544 ("intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-04-21 14:02:02 -04:00
Ranjani Sridharan
03a91ccc39 drivers: intel: ssp: Fix checked expression in WAIT_FOR()
The function dai_ssp_poll_for_register_delay() is meant to poll the
register until the value of the mask bits is equal to the "val"
argument or until poll timeout has occured. WAIT_FOR() returns the value
of the checked expression, so the check should be modified accordingly.
This should prevent the errors seen during every SSP trigger as below:

<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487432 mask 4 val 4 us 125
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487496 mask 63 val 0 us 937

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-04-20 07:26:14 -04:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Pierre-Louis Bossart
6d9afd36af drivers: dai: intel: ssp: don't set ACE2.x LCTL::OFLEN
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.

Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
1659aa2e0c intel_adsp: ace20_lnl: Fix i2svss DT field initialization
This patch fixes i2svss field initialisation in Device Tree for LNL
platform. It fixes this bug: #482

Problem is observed only when using SSP_BLOB_VER_1_5 version.
Unfortunatelly this version is not tested in FW validation tests.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
b75b4153d6 intel_adsp: ace20_lnl: Add I2S clock source configuration
Add I2CLCTL_MLCS programming in SSP driver.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
b252673f13 intel_adsp: ace20_lnl: Fix hang issue on SSP power off
Clearing SPA bit together with OFFLEN bit causes FW hang.
This patch changes sequence to avoid that situation.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
3b518743d2 drivers: ssp: Program slot number basing on blob
The upper ssp slot number should be retrieved from configuration
blob to support all possible settings. This patch fix this issue.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
99d5d9aaa8 drivers: ssp: Repleace shim2 with hdamlssp
Repleace usage of shim2 device tree field with hdamlssp.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
1e5550d262 intel_adsp: ace20_lnl: ssp: Program new HW registers
In LNL platform GPDMA and ALH is no longer used. SSP uses LINK HDA
as a DMA engine. Therefore new shim, new register definitions and new
programming flows were defined.

This patch implements new SSP programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Pierre-Louis Bossart
a744e8eaf3 drivers: dai: intel: dmic: don't set ACE2.x LCTL::OFLEN
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.

Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
b8d9b833a2 intel_adsp: ace20_lnl: dmic: Add HDA channel map programming
Add new field to dai_config structure and function that
program it in HW register.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
2547948544 intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic
In LNL platform GPDMA and ALH is no longer used. DMIC uses LINK HDA
as a DMA engine. Therefore new shims, new register definitions and new
programming flows were defined.

This patch implements new DMIC programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
dc9f7b44fe intel_adsp: ace20_lnl: dmic: Add new DMIC shims to driver
Add initialization of new DMIC shims to driver for LNL
platform only.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Anas Nashif
402ac9e409 drivers: remove references to old CAVS platforms
Remove reference to all dropped CAVS platforms in drivers.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-06 18:51:56 +02:00
Ranjani Sridharan
c56f5d53b7 drivers: ssp: Ignore link clock_source for non-ACE platforms
Ignore the link clock_source for non-ACE platforms instead of throwing
an error when it is set in the topology.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-04-06 11:50:27 +02:00
Tomasz Leman
98b89d5f9a drivers: dmic: set initial state as off
With this patch DMIC device after init will be in OFF state. When power
domain will be powered-up device will switch into suspended state and
change it to active only when is used.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-05 08:31:16 +02:00
Tomasz Leman
0a00253313 driver: ssp: set initial state as off
Since the device need to be first powered-up by the power domain, it has
more sense that device is in off state at the beginning.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-05 08:31:16 +02:00
Fred Oh
1851950977 drivers: dmic: clear MIC_MUTE bit for ACE
When releasing a paused stream, clearing MIC_MUTE bit is necessary.
Without unmuting there will be no input data after resume.

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2023-03-28 16:34:40 -04:00
Fred Oh
98bf16a569 drivers: dmic: clear SOFT_RESET bit for ACE as well
Clearing SOFT_RESET bit applies to ACE as well. In case of ACE,
this should be done before setting start bits for CIC and FIR.

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2023-03-28 16:34:40 -04:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Seppo Ingalsuo
8ef2cd20d9 Drivers: DAI: Intel: DMIC: Shorten unmute ramp time
This change produces more quickly in the stream valid
audio samples. The start fade-in ramp can be shortened to
100 ms for 48 kHz and 200 ms for 16 kHz. It was before 200 ms
and 400 ms. The updated DMIC hardware in allows to do this
change.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
2023-02-28 11:43:14 +01:00
Jaska Uimonen
26e4da9511 drivers: dai: intel: ssp: add aux data support
Intel SSP configuration can have auxiliary data embedded after it in a
variable length tlv array. Enable the parsing of this data and add the
data structs to describe the contents.

For now add support only for new version 1.5 blob. This is because
legacy blob doesn't have size field to describe its variable size.
Auxiliary data parsing has currently only 1 setting for link clock
needed in ACE platforms.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-02-19 20:43:34 -05:00
Jaska Uimonen
c64f91de1a drivers: dai: intel: ssp: add blob 1.5 support
Add support for newer data blob version 1.5. Refactor the code to re-use
the common register setting. Clock setting will be handled differently
with legacy and version 1.5 blob.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-02-19 20:43:34 -05:00
Jaska Uimonen
3b7f9c320d drivers: dai: modify dai_config_get API func
Modify dai_config_get function to have the config struct as argument.
This was not a showstopper but a request in the API review.

In the same patch modify all Intel dai drivers using the API to preserve
bisect/compile.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-02-19 20:43:14 -05:00
Kai Vehmanen
8374325062 drivers: dai: intel: dmic: don't use assert for error handling
The dai.h interface does not prohibit calling dai_config_get()
with different direction values. The dmic driver should handle
invalid direction value explicitly and not rely on an assert.

Link: https://github.com/thesofproject/sof/issues/6896
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-01-12 10:01:41 +01:00
Hein Wessels
3210541c86 toolchain: gcc: rename popcount to avoid conflict with C++20
The macro conflicts with the C++20 feature std::popcount

fixes zephyrproject-rtos/zephyr#53421

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-01-03 11:06:45 +01:00