Several GPIO device drivers support only one of the two possible
access_op modes and return an errno error code for the mode they do
not support. Use the same errno code across all drivers.
Change-Id: Ic01ce9dee7fb2405d254c60cebee22053c803270
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Several GPIO drivers detect an out of range pin number and return an
errno error code. Use the same errno code across all drivers.
Change-Id: I0e2949432d6845d12c37064c78f9c228b8e8e45a
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Several gpio drivers consider GPIO_INT with GPIO_DIR_OUT to be illegal
and return an errno code. Use the same errno code across all drivers.
Change-Id: I1594df0cfdf96194685c83c34dff36261896f2de
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Implement the missing port read and write behaviour.
Change-Id: I0928379eddf81d806a0ae6b75a1ea2993c3a28ff
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Adjust the implementation of gpio_pin_read() to return 0 or 1 rather
than 0 or 2^pin. This ensures consistent behaviour with other gpio
device drivers, and conforms to the behaviour documented in gpio.h by
the previous patch.
Change-Id: Ia02aa68105a406f355d16a3f9b0550f948658483
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Extended the nRF5 GPIO driver to support configurable pin drive
strengths.
Change-Id: I59c42b8a69cc37b594c2388b892d3accd7b19807
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The NXP copyright should not have 'Semiconductors, Inc' in it.
Change-Id: I6e290146d49bf22d1d40b7fa764bb53b6b122303
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The commit c90e4d063be0ff5f47df45ca8500eff8518c5d25 changed
line 216 in drivers/gpio/gpio_stm32.c:
-elif CONFIG_SOC_SERIES_STM32F4X
+#elif /* CONFIG_SOC_SERIES_STM32F4X */
This causes the following compiler error:
zephyr/drivers/gpio/gpio_stm32.c:218:39: error: #elif with no expression
#elif /* CONFIG_SOC_SERIES_STM32F4X */
^
Change-Id: Ie8b124931e333aa7860e6db22f5c259670e29833
Signed-off-by: Michael Scott <michael.scott@linaro.org>
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.
Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
This is one of the series of patches that simplifies the driver
code by using the IS_ENABLED macro. This removes the need of the
const variable and the three wrapper functions on semaphore APIs.
Jira: ZEP-1251
Change-Id: I5102e8674663ddbfc65220de72c8b778a9ec726c
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
tested with blinky, button and disco apps
Change-Id: I4b520d4f3e42c97e4a723747ce4a6c67ca9f1d18
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
Now that we have a more generic mcux gpio driver that can be used across
multiple Kinetis SoCs, remove the specific k64 gpio driver.
Jira: ZEP-1394
Change-Id: I177f96a75e441b70c523e74e99f1b7a54eac6b0e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new mcux gpio driver that can be used for k64 and other Kinetis
SoCs. This driver uses mcux CMSIS register accesses to the GPIO and PORT
modules. Some of the logic from the k64 gpio driver was reused and
refactored (mainly flag parsing and callback handling).
Jira: ZEP-1394
Change-Id: If5e9390861c181ec555dce6569b14debb729526a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
drivers/gpio/gpio_pcal9535a.c defines a nano_timer,
but never uses it. So delete it.
gpio_sch.c uses a k_timer, but gpio_sch.h defines a
nano_timer. So change the variable poll_timer to
type k_timer.
Jira: ZEP-1525
Change-Id: I884e4703c1ace61da5be7d9c63e58e7c3bce7f68
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.
Keep the legacy samples/tests as is.
Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The GPIO_INT_LEVEL value is zero so the mask assignement
is never executed. Using the bit complement GPIO_INT_EDGE
the proper mask is assigned
This issue was reported by Coverity
Coverity-CID: 151966
Change-Id: Iacfeb6466388023bd6123ba86280aa9ca15f34e4
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The GPIO_INT_LEVEL and GPIO_INT_ACTIVE_LOW values are zero so the
statements are never executed then is better use the bit complement
masks
This issue was reported by Coverity
Coverity-CID: 157586
Change-Id: Ic8b20660a991dd3d0c71248f84c917e5ce5c3c7c
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
To support interrupt-based GPIO callbacks in the nRF5x series one needs
to use the GPIOTE module, which has a series of channels that can be
programmed to trigger interrupts on level changes.
This commit adds basic support for the GPIOTE module within the nRF5x
GPIO driver, as well as callback support in order for basic buttons and
switches to work.
Change-Id: I9ae600f894372ad42b09a18cc38a90fc29abb0df
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/basic/blinky
- samples/basic/disco
- samples/basic/button
All 4 GPIO ports are supported.
Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch enables the clock control interface into the ARM LTD
Beetle GPIO driver.
Jira: ZEP-1300
Change-Id: I576767b68a8e4aa965d34716528df3bb4e837d73
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add the support for all the GPIO port of the L4.
Change-Id: Id365e17223cd5c49443df9fb6b96a3c4f204f523
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151978
Change-Id: I93ec3319a3f18d564c961a5cbd9dcc9c60efbeb7
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The GPIO_INT_ACTIVE_LOW value is zero so the mask assignement is
never executed. Using the bit complement GPIO_INT_ACTIVE_HIGH the
proper mask is assigned
This issue was reported by Coverity
Coverity-CID: 151966
Change-Id: Ibc7d2e4c3ebee249b5ab9719f8177cc14c0d1d33
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity (CID 150821).
Change-Id: I6c0e9fe405cbd3e35454a81754fa0b1c721691f0
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151833
Change-Id: Ie952d6f50c0383d5631325b69e8e8b234c67c4b8
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This fixes an always false evaluation of the gpio I/O direction
This issue was reported by Coverity
Coverity-CID: 151834
Change-Id: I033e368b2e91d888f2e8a797490df757513c3906
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the gpio_dw_isr declaration.
* Adds guards to the header files.
Change-Id: I1ae70868f0bda97891cbeb494e5efba1bd537aa1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
Change-Id: I4c8df0999f92a834d4023ce5856a2a6c39797c00
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch removes a redundant "depends on" from the gpio Kconfig for
nRF5X family.
Change-Id: I28ac15b58839e05f47ade81bef66a03a0a44bebd
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the gpio_sam3_init declaration.
Change-Id: If5c8a1822d6c116ea34d0f220f3e5fa359b6fa18
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Use unified kernel APIs and align syntax after function name changes.
Change-Id: I028f4faeaf33e28197d5f705063459188272027d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit updates the gpio_qmsi_ss driver by adding save/restore
context functionality for power management, using the corresponsing
QMSI APIs.
Jira: ZEP-665
Change-Id: I5d8b6050f5b099678b7e6d9144907ea2ce2dda4b
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
The driver is currently used only by the ARM Beetle platform.
Jira: ZEP-1245
Change-Id: I6611edd7486a3c6d82d66a9a96c5d4860dad1539
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
It's unused anywhere and unlikely to be in the future.
Change-Id: I57926e91da7d31ef6ddda4f86e6dac103dbfa176
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit updates the gpio_qmsi driver by removing the temporary
Zephyr save/restore context implementation and using the new QMSI APIs.
Jira: ZEP-999
Change-Id: Ic7b80a8f86baa7a6be11c93bbdebb18a102b0221
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
For AON peripherals on Quark SE C1000, an API is needed
to retrieve the interrupt status after wake up.
This enables the application to know the wake source before
enabling again the interrupts.
Add this API to the gpio as this is a wake event
on Quark SE C1000.
Jira: ZEP-1188
Change-Id: Icc4aa6617bf18402b7e5dc3aab779ec2964e1c5b
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
The GPIO and AON GPIO ports are available to both the x86 and ARC
cores, but the driver always assumed only the x86 at the time of
configuring interrupts.
Use the available macros to set the correct values independently of
which core it's being built for.
Jira: ZEP-1030
Change-Id: I310afcc48780fbe1cac9dc3368a6de11bd797fda
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The SoC level peripherals are accesible by both cores, while the SS
ones are only available to the sensor subsystem. Since the ARC core can
make use of both drivers at the same time, we need to be able to
differentiate their configuration values somehow.
Also disable the SoC GPIO for the ARC by default, as it still needs
more changes to be usable.
Jira: ZEP-1030
Change-Id: Ic5415c404ecd32a3e560467b6f5eaa873a515d72
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The callback from the QMSI driver now can take a data pointer to pass
to the given function, so use that to pass the device to our callback
instead of defining one function for each supported port.
Change-Id: I82d863314e0443b7c4a12d4a9ad763b9634ca8e2
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Implements MCU-specific GPIO input interrupt integration. Added
definition of System configuration controller as well as its needed by
the GPIO code.
The SYSCFG controller is used for system-specific configuration such as:
- remap the type of memory accessible at address 0x00000000
- manage the external interrupt line connection to GPIOs
- configure the I/O compensation cell
Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Make default value compatible with both nRF51 and nRF52.
Change-Id: I65dafbdf8518103becdd7388e9c0195ef1c4460d
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
PCI enumeration modifies pci_dev and base_addr at driver
initialization therefore these objects move from config_info to
driver_data in preparation for config_info becoming const.
We drop code that attempts to update irq_num based on PCI enumeration
because the interrupt found by PCI enumeration must always be the same
as the statically configured IRQ number.
Change-Id: Ibfefa851d2836d524b8151ed0108ecf9de2cd3a3
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Since dd5e90ec the device_get_binding call returns NULL unless the
driver_api is set by the driver. Since the exti driver only uses an
internal struct to store the callbacks, remove the need for the device
binding call from other drivers (e.g. gpio).
Change-Id: If0b733c27754108118d87ef02640311f0535ab57
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
The k64 pinmux driver can be used for any k64 board, not just frdm_k64f,
therefore renaming the driver accordingly.
Change-Id: I45e96d4a5ff6aa859d0f57fe098e44a8ae5283d1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The callback list within the driver config is updated dynamically
hence the list itself cannot be const. Create a runtime context
driver data structure and relocate the callback list to the new
structure.
Change-Id: Ied20846e6a78e43967239afa7797456a9abd8548
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.
Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Don't use the previous reg value when setting up just one specific pin,
as it can have a side effect on other gpio pins.
Change-Id: I60e69950a72446a6fa7087b13dbcecf6ae4b15e4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
NRF_GPIO_BASE can be used by both the nrf51 and nrf52 families, as it
gets defined by the nrf5x.h header files.
Change-Id: I8e6b265d9ce94551389ca170f105a53c88d58c68
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
No need to create new Kconfig that do exactly the same, just
reuse those from the main QMSI driver.
Change-Id: I965055f36845ac0464e4a383b0d05c3ae35c0015
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
Bug was introduced by a6cf6038e3
Change-Id: I91ceab2ca20c4d2f70a953b56d895152a471125a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In 1.0 you could set only one callback on the whole gpio controller. It
was impossible for another sub-system to add another callback, without
overwritting an existing one.
Such API has been obsolete for a long time and no one is using it
anymore. Thus removing it entirely.
Change-Id: I6a17fd99373dc6cef1fa2ebb421e992412d5015e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen. References to 'platform' are change to 'board'
Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
pcal9535a driver is now using new system log macros and updated the
Kconfig variable to be a level rather than a bool.
JIRA: ZEP-311
Change-Id: Ic3d6c72630e66ac116c1e8954c32254677c51566
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
GPIO drivers are now using new system log macros also updated the
Kconfig variable to be a level rather than a bool.
JIRA: ZEP-311
Change-Id: I9a49626d816080cb8081c2dd445bae31f5dbf409
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
In order to restore GPIO context after entering
SYS_PM_DEEP_SLEEP, the suspend and resume
functions for GPIO and GPOIO_AON are called. The
following parameters are restored:
- All non-sticky RW registers for the GPIO device.
- The MASK register (interrupt routing register).
Note: No need to sve/resume AON_GPIO registers as
they all are sticky registers.
The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.
Change-Id: I68e25c9da4bb8ea65f312e3686d9ef090cb775ff
Signed-off-by: Dragan Cvetic <dragan.cvetic@intel.com>
We don't currently have a SOC_NRF5 Kconfig symbol. Utilize the
SOC_FAMILY_NRF5 Kconfig symbol instead.
Change-Id: I062ecab230e9e7814fad19517d28ddbbae66bccb
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will guard the driver API to be safe for concurrent
invocation from fibers or tasks.
The machanism is by default disabled. To enable it, the
following flag needs to be defined:
CONFIG_GPIO_QMSI_API_REENTRANCY
Jira: ZEP-441
Change-Id: Ia3ee738aff2f8e70e4f9a7ec76346138ff6f5031
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
This will allow the driver API to be safe for concurrent invocation
from fibers and task.
The machanism is by default disabled. To enable it, the following
flag needs to be defined:
CONFIG_GPIO_QMSI_SS_API_REENTRANCY
Jira: ZEP-411
Change-Id: I5b738532f2eefec6d5d78ab6a668790dfe9faaff
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
address was passed to QMSi port read function, even though
value is needed.
Change-Id: I6b923fdc56114936fb4a0c55c923d6b37884e07c
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
I notice there are some more places in this file
that can be switched to using tabs.
Change-Id: I7dac2b91f932aa6f167b7eaf93e7c8f571a22d41
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The file gpio_dw_registers.h already had the 4-port GPIO
registers defined, yet the gpio_dw.c implementation didn't
support it properly. There are 4 ports here, not 2, and only
PORTA can support interrupts and debounce.
On the em_starterkit board, for example, PORTA
has 3 bits for buttons: A, L and R. The other 3 ports should not
be used with interrupts & debounce.
I've re-worked this file to derive the port number from the
base address given. The lower 6 bits are divided by 12 to
derive the port number. From this, the registers EXT_PORTA,
EXT_PORTB, EXT_PORTC or EXT_PORTD can be read.
Also, for those ports that don't support interrupts,
set irq_num to 0, and that code will be avoided. I've verified
that I can access GPIO now correctly on the EM Starterkit. The
em_starterkit board support will be submitted soon but I'm
staging in this change first.
Change-Id: I98dbe083e03e046b40e07b4b14a99a39a6d0f0be
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add QMSI 1.1 based GPIO sub-driver for sensor system.
Origin: Original
Change-Id: Ida5565a5911eb55651a11a4ac0b240c624f8e1ca
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Comparing the Synopsys GPIO driver with the one here in Zephyr revealed
that some register symbols are missing. I am adding them now, and will
be working on getting GPIO working on ARC EM Starterkit board.
Change-Id: Ifccd1e225eb1373a31c6a5c51cf3927e42601d1a
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
DEV_* error codes are deprecated and should not be used anymore. This
patch replaces DEV_* occurrences by the corresponding errno.h code,
according to the error code conventions.
Change-Id: I2f38c869b4e00d22145e24375796ba6bf216b084
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Use I2C register access API for writing/reading registers.
Change-Id: Ic35b3e7159f9827f2d202d8cd1ae8f26ee6300f1
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
Many sub-systems might require to set a callback on different pins.
Thus enabling it via changing the API.
It is also possible to retrieve private-data in the callback handler
using CONTAINER_OF() macro (include/misc/util.h).
Former API is still available, and is emulated through the new one.
Using both should not be a problem as it's using new API calls.
However, it's now better to start using the new API.
Change-Id: Id16594202905976cc524775d1cd3592b54a84514
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Note that the failure case can only be reached when PCI is enabled.
Otherwise, the if-block is always false, which reduces code size
for non-PCI platforms.
Change-Id: I1f9def66b2ce7f08fc13b8f03e675ce4cd469e6d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the assignment of driver_api to just before
the init function returns. This is in preparation to
make device_get_binding() return NULL if driver
initialization fails.
Change-Id: Ibf08cb107885da7c1037c6e7d207530e1a4708f8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The D2000 CRB is similar to the Arduino 101 (at least as GPIO is
concerned). Add support for using the GPIO controller without QMSI
libraries.
Change-Id: I001da05c9a9d5771b2ec678a9d4a91c44db05289
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Current interrupt status tells which pins triggered this interrupt, thus
the handler should acknowledge only these and not all possible, since we
don't know if other gpio controller interrupts are being taken care of
at the same moment.
Change-Id: I7d3f1bb13bb293f7b7ce9b5a717a37bbdd4e4e42
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Added device power management hook infrastructure. Added
DEVICE_INIT_PM and SYS_INIT_PM macros that creates device
structures with the supplied device_ops structure containing
the hooks.
Added example support in gpio_dw driver. Updated the sample
app and tested using LPS and Device Suspend Only policies.
Change-Id: I2fe347f8d8fd1041d8318e02738990deb8c5d68e
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Build with GPIO port E failed due to a missing comma.
Change-Id: Ib8fa7f4d03ed4f4c713a3a8a16ad3b37fcf6b0b7
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This patch fixes gpio_stm32 driver since it was merged with a few
occurrences of DEV_* error code.
Change-Id: I025e4f83d8ca07bc0fed7d3dcb9cce3b9d11c3fc
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Makes K64 gpio driver submenu available only if K64 soc is
selected.
Change-Id: I4097006a4dca718ed2da730fa85cd2ad9970f419
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Moves STM32 gpio driver under its own submenu, like atmel SAM3
and K64 gpio drivers.
Change-Id: Iebc474af9818a73275f99183d3f4788eea1e6ded
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch fixes the gpio, i2c and watchdog shim drivers so they set the
CLK_PERIPH_CLK bit during driver initialization. Differently from Quark
SE, the peripheral clock gate bit (CLK_PERIPH_CLK) is not enabled by
default in Quark D2000. We have to explicitly set this bit in order to
properly initialize the device.
This issue has been masked so far because the CLK_PERIPH_CLK bit is set
when UART NS16550 driver is enabled. The UART NS16550 driver is enabled
by default for Quark D2000 so gpio, i2c and watchdog sample apps were
working just fine. But if we disable the NS16550 driver, these samples
applications stop working.
The remaining shim drivers already set the CLK_PERIPH_CLK bit during
initialization so there is no need to fix them.
Change-Id: I3f658da564f87e9d52092ce7aac423c7b3e0c890
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add support for interrupts for input GPIO pins on STM32 MCUs. The SoC
support code is expected to provide an implementation of
stm32_gpio_enable_int() call.
Change-Id: I61bae54b8e044be4d7d8eb60c0c67b71f8c59553
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
The driver implements a GPIO device interface for STM32 MCUs. Each SoC
must provide implementation of the follwoing calls:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(),
stm32_gpio_set(). Consult gpio_stm32.h header for details on semantics
of these calls.
The driver registers 5 devices, each corresponding to a single GPIO
port. The users can then access individual pins by using values
0-15.
Change-Id: Id236b5b75c9dd091018a50a7be3501c8591cd551
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
() Moves config options for each controllers into their own
Kconfig files. This keeps drivers/gpio/Kconfig from getting
too big.
() Options for each controller are moved under their own
submenus.
() Re-named the device names to standard as "GPIO_0", "GPIO_1",
etc.
() Adds the missing copyright to Kconfig.atmel_sam3.
Origin: refactored from existing file
Change-Id: I7c531b0109ca5a6840d3abd9daa6bc784f15233d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
