Commit Graph

509 Commits

Author SHA1 Message Date
Richard Osterloh
f7bad922f0 drivers: gpio: Add STM32G4X gpio support
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Jose Alberto Meza
4c095b5cbc drivers: gpio: xec: Ensure GPIO input is enabled
All GPIOs except VCI pins come in default GPIO mode and  input disabled
Need to explicitly enable input apart from setting direction.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-30 13:42:58 -07:00
Yannis Damigos
efec7f73b7 dts: esp32: Add GPIO support in DT
Add GPIO support in DT

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-09-25 17:39:42 +02:00
Anas Nashif
8c2a63ab7d drivers: gpio: remove qmsi gpio driver
No users of this driver after dropping quark platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Anas Nashif
6bdfe5dc16 drivers: gpio: remove sch gpio driver
Was used on galileo which was removed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Piotr Mienkowski
f98084131e drivers: clean up flags in gpio_intel_apl driver
Modify the way we test for flags as a precursor to the new GPIO API.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-18 13:28:58 +08:00
Peter A. Bigot
dc553f8fde drivers: gpio: fix misuse of u8_t where bool is intended
GPIO configuration flags will move and some that used to be in the low
8 bits are now higher, resulting in implicit constant conversion
overflows.  Use a boolean data type to hold boolean values.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-18 13:28:58 +08:00
Erwan Gouriou
c9dcf37e6c Revert "gpio: stm32: support disabling and reenabling interrupts on pin"
This reverts commit 0951ce2d34.

This change introduces regression on GPIO interrupts handling
when several GPIOs are configured.

Fixes #19177

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-09-16 05:44:15 -05:00
Piotr Mienkowski
b914ba8831 drivers: remove gpio_atmel_sam3 driver
The gpio_atmel_sam3 is no longer required since the gpio_sam, common
SAM family GPIO driver, provides improved functionality.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-12 13:25:30 -05:00
Piotr Mienkowski
17b3ead21a drivers: fix #ifdef in gpio_sam driver
- prefix SOC_SERIES_ defines with CONFIG_
- exclude pull down configuration on sam3x series

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-09-12 13:25:30 -05:00
Marcin Niestroj
0951ce2d34 gpio: stm32: support disabling and reenabling interrupts on pin
Up to now interrupts could be only configured once, with no way to
disable them in runtime.

Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-09-12 08:41:44 -05:00
Andy Ross
346cce31d8 kernel: Port remaining buildable syscalls to new API
These calls are buildable on common sanitycheck platforms, but are not
invoked at runtime in any tests accessible to CI.  The changes are
mostly mechanical, so the risk is low, but this commit is separated
from the main API change to allow for more careful review.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-09-12 11:31:50 +08:00
Chris Schramm
ed9c1ce55d drivers/gpio: pcal9535a: fix i2c write
writing to both port registers of pcal9535a
was broken

fixes #17625

Signed-off-by: Chris Schramm <schramm@makaio.com>
2019-09-10 15:09:53 -05:00
Kumar Gala
95f78bcacf interrupt: Convert RISC-V plic to use multi-level irq support
Utilize the multi-level irq infrastructure and replace custom handling
for PLIC on riscv-privilege SoCs.  The old code offset IRQs in drivers
and various places with RISCV_MAX_GENERIC_IRQ.  Instead utilize Zephyr's
encoded IRQ and replace offsets in drivers with the IRQ define from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Charles E. Youse
68f45fd6d4 drivers/gpio/gpio_dw: remove support for legacy PCI interface
Only Quark SoCs used this IP block hanging off a PCI bus, and the PCI
support is written for the deprecated legacy PCI subsystem, so remove.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-08 22:09:10 -04:00
Marcin Niestroj
c62b57fbd4 gpio: stm32: fix build for stm32l0x with no GPIOH
Some smaller stm32l0x MCUs, such as stm32l011x, do not have GPIOH
port. Fix build for those by checking LL_SYSCFG_EXTI_PORTH macro.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-08-26 09:48:54 -05:00
Anas Nashif
ab9c528734 gpio: remove unused qmsi driver
This driver was used by the sensor subsystem in Arudino 101. Remove as
the board was dropped.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-08-21 09:52:01 -04:00
Andrzej Głąbek
c542a4c56f drivers: gpio_nrfx: Correct the way the callbacks are fired
Add additional masking of the pins with fired callback triggers
against the currently enabled callbacks, in order to not call
handlers for callbacks that got disabled in some other callback
handlers that were called in the same ISR execution.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-08-14 14:49:55 +02:00
Nicolas Pitre
75bf3c5368 riscv: freedom: rename RISCV32 to RISCV
This code is common to 32- and 64-bit builds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Nicolas Pitre
e5981f2b71 drivers: sifiv: make them 64-bit compatible
Make those drivers compatible with a 64-bit build.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Ulf Magnusson
d1dff7129b drivers: gpio: Remove redundant GPIO dep. from GPIO_HT16K33
GPIO_HT16K33 is defined in drivers/gpio/Kconfig.ht16k33, which is
source'd within an 'if GPIO' in drivers/gpio/Kconfig.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-08-07 08:14:10 -05:00
Findlay Feng
4b18a079d9 drivers: gpio: add stm32f1x SWJ configuration
Add the serial wire JTAG configuration of the stm32f1x family.
Before gpio is initialized, you can choose to turn off the debug pin to
make the used pins available.

Signed-off-by: Findlay Feng <i@fengch.me>
2019-08-05 13:22:34 +02:00
Tomasz Bursztyka
e555ddd9e6 drivers/gpio: Adding missing braces for XEC driver
Even one liner if () statement should have braces.

Fixing parameter indentation as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-08-02 23:24:34 +03:00
Kumar Gala
4e7863dc41 dts: Make instance defines consistent
We generated a define for each instance to convey its existance of the
form:
	#define DT_<COMPAT>_<INSTANCE> 1

However we renamed all other instance defines to be of the form
DT_INST_<INSTANCE>_<FOO>.  To make things consistent we now generate a
define of the form:

	#define DT_INST_<INSTANCE>_<COMPAT> 1

We also now deprecate the DT_<COMPAT>_<INSTANCE> form and fixup all uses
to use the new form.

Fixes: #17650

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-30 17:10:31 -05:00
Anas Nashif
578ae40761 boards: remove quarl_se_c1000
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Erwan Gouriou
b44f0eacd5 drivers/gpio: stm32h7: Don't use HSEM_CR_COREID_CURRENT as process id
HSEM_CR_COREID_CURRENT was used as process number parameter in
LL_HSEM_ReleaseLock function. While this is working, this
define should not be used in this context.
Also, process number parameter is actually proposed in case of HSEM
use in inter-process context but is not required for inter-core
resource lock. Replace HSEM_CR_COREID_CURRENT with 0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-26 11:25:05 -04:00
Francois Ramu
dd3ee06af7 drivers: gpio: Add STM32G0X pinmux support
Add gpio support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/gpio/gpio_stm32.h
2019-07-05 10:35:55 -05:00
Francois Ramu
9b2025c891 drivers: pinmux: Add STM32G0X pinmux support
Add pinmux support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/pinmux/stm32/pinmux_stm32.h
2019-07-05 10:35:55 -05:00
Erwan Gouriou
0914f1031d drivers/gpio: stm32: Add semaphore on gpio_configure
Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write

Protecting gpio_configure also protects access to
interrupt_controller IP.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
d185ec4cff drivers/gpio: Add support on STM32H7 series
Add GPIO support on STM32H7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Anas Nashif
a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
d222553931 cleanup: include/: move misc/speculation.h to sys/speculation.h
move misc/speculation.h to sys/speculation.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
536dd5a71f cleanup: include/: move misc/slist.h to sys/slist.h
move misc/slist.h to sys/slist.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
9ab2a56751 cleanup: include/: move misc/printk.h to sys/printk.h
move misc/printk.h to sys/printk.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5d001f3e41 cleanup: include/: move misc/byteorder.h to sys/byteorder.h
move misc/byteorder.h to sys/byteorder.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5eb90ec169 cleanup: include/: move misc/__assert.h to sys/__assert.h
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
a8167ab17d cleanup: include/: move pinmux.h to drivers/pinmux.h
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
8f692c7d38 cleanup: include/: move i2c.h to drivers/i2c.h
move i2c.h to drivers/i2c.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
6aa9c3a68f cleanup: include/: move gpio.h to drivers/gpio.h
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
17ddd1714c cleanup: include/: move clock_control.h to drivers/clock_control.h
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
ef281c4237 cleanup: include/: move sys_io.h to sys/sys_io.h
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
190e368275 cleanup: include/: move power.h to power/power.h
move power.h to power/power.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
43a49335f4 include: move interrupt controller headers to interrupt_controller/
Move internal and architecture specific headers from include/drivers to
subfolder for interrupt_controller:

include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:27:00 -04:00
Charles E. Youse
57b46bbc85 soc/x86/intel_quark: remove support for Quark D2000 SoC
Removed Quark D2000 SoC files and first-order related DT bindings.

A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Kumar Gala
f20d2b6f41 drivers: rv32m1: remove bogus IRQ_PRI related defines
The defines related to IRQ priority don't exist and aren't used.  So
just pass 0 to IRQ_CONNECT for the priority field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:22:27 -04:00
Kumar Gala
dba65ce47c drivers: Update DT IRQ alias defines
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00
Anas Nashif
f2cb20c772 docs: fix misspelling across the tree
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-19 15:34:13 -05:00
David B. Kinder
2aebc980e2 doc: fix Kconfig misspellings
Fix misspellings in Kconfig files missed during regular reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-18 15:07:52 -04:00
Kumar Gala
a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Anas Nashif
4c32258606 style: add braces around if/while statements
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-06 15:20:21 +02:00