The USART_IntGet() function seems to return masked interrupts in the
function uart_gecko_irq_tx_ready() where it should return only
non-masked interrupts. Using USART_IntGetEnabled() fixes this issue.
This issue was discovered when using the mcumgr UART backend in the
uart_mcumgr_isr() function.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of GPIO routing for peripherals.
It is based on the GPIO registers and no longer peripherals' registers.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of clock for watchdogs.
It requires an additional peripheral-id parameter in the dts to get the
proper clock as it is based on the watchdog's ID i.e., cmuClock_WDOG#.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of GPIO routing for peripherals.
It is based on the GPIO registers and no longer peripherals' registers.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Use the GPIO API from emlib instead of accessing the register directly:
The emlib API is doing the checks and uses the proper registers
depending on the SoC used.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Add HSI divisor support for clock tree configuration.
Removed HSI calibration trimming to comply with
common STM32 implementation and use reset default
configuration instead.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Adds preprocessor clock feasibility check to avoid setting
too high clocks to SYSCLK,AHB,APBx buses.
Also checks if CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
matches with the desired clock configuration by
the M7 core.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fixed wrong usage of assertions.
Assertions should check that the value is in range and
not out of range.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fixes#27212 by setting the AHB/APBx dividers
prior to configuring the PLL as clock source.
Prevents going over the limits of APBx clocks when
choosing the PLL as system clock source for
high frequencies (close to 480MHz)
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fix a regression that caused flashing on nRF51x Series to stall
the Bluetooth low energy controller and flashing under
BT_CTLR_LOW_LAT option.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
This commit adds support for setting fixed configuration, read
from device tree, for ENET ETH interface and PHY.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Some ICs - like DSA switches (e.g. ksz8794) - do not use SMI to setup
and configure PHY.
This change introduces a new Kconfig define - CONFIG_ETH_MCUX_NO_PHY_SMI
- to allow replacing SMI communication with SPI or I2C.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Using SPIM_FREQUENCY_FREQUENCY_M32 to check if the device has HS-SPI and
able to use higher SPI clock than 8MHz.
Signed-off-by: Jui-Chou Chung <jui-chou.chung@nordicsemi.no>
Now that the relevant APIs generalize properly for bindings without
flags, we can remove some special case checks from the tree.
I couldn't find any more, but I did this kind of quickly, so it's
possible I missed some.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
After changes made in ff089217cb, clock control release can now return
non-negative values on success.
Signed-off-by: Rihards Skuja <rihardssk@mikrotik.com>
Removed potential race condition between uart being disabled and
rx_buf_rsp call.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added detection of uart_rx_buf_rsp call which happend to late when
uart is already disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
PPP implementation uses ring_buffer API, but RING_BUFFER Kconfig option
was not selected so far. This resulted in linker errors about undefined
reference to `ring_buf_get_claim' and 'ring_buf_put'.
Add missing RING_BUFFER selection via Kconfig, so PPP driver is properly
built.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This set of functions seem to be there just because of historical
reasons, stemming from Kbuild. They are non-obvious and prone to errors,
so remove them in favor of the `_ifdef()` ones with an explicit
`CONFIG_` condition.
Script used:
git grep -l _if_kconfig | xargs sed -E -i
"s/_if_kconfig\(\s*(\w*)/_ifdef(CONFIG_\U\1\E \1/g"
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
When `CONFIG_UART_ASYNC_API` is enabled, cleanup any pending synchronous
receptions at initialization time. Pending receptions are present when
this driver is used with the default mcuboot application.
When `CONFIG_UART_ASYNC_API` is not enabled, RX is always enabled by
this driver. As mcuboot does not use the async API, and does not cleanup
the UART driver before jumping to the next application, that application
boots with RX still enabled. This results in a 500uA increase in current
consumption.
Fixes#26555
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
In order to be able to add more entries under 'subsys/mgmt', move the
current contents of it, which relate exclusively to MCUMgr, to its own
folder.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
There are possible buffer overflows when parsing the ip address and
SSID. Ensure that we never overwrite the ip and SSID buffers.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Of course IPM drivers now provide their device instance. There are 2
drivers using IPM callbacks as well, so they get the imp device instance
pointer now through the callback.
Fixes#26923
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It was already using uart_irq_callback_user_data_set below, now it also
uses uart_irq_callback_user_data_t as callback type, so let's normalize
the callbacks.
Fixes#26923
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch adds adds an EEPROM driver supporting the on-chip EEPROM
found on NXP LPC11U6X MCUs. Note that this driver is only a wrapper
relying entirely on the IAP (In-Application Programming) EEPROM
commands.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
