Commit Graph

11 Commits

Author SHA1 Message Date
Carlo Caione
87d8a035dd arch: arm64: Support aarch64-gcc compiler
To be able to successfully compile the kernel for the ARM64 architecture
we have to tweak the compiler-related files to be able to use the
AArch64 GCC compiler.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Charles E. Youse
3cf1bff71c arch/x86: complete 64-bit linker script
The previous linker script was barebones and non-standard. It is
replaced with a script conforms to the rest of the Zephyr arches,
utilizing include/linker headers and standard macros.

link-tool-gcc.h is updated to account for the "i386:x86-64" arch and
the generation of 64-bit ELF binaries.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Charles E. Youse
6767563f94 arch/x86: remove support for IAMCU ABI
This ABI is no longer required by any targets and is deprecated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-07 10:07:42 -04:00
Nicolas Pitre
1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Kumar Gala
4da0f8b796 linker: Remove unused (OPTIONAL) from linker scripts
(OPTIONAL) was a vestiage from the initial import of the Zephyr code
base and we dont utilize it with the GNU linker.  Additionally, the way
(OPTIONAL) gets defined to nothing creates a linker script that lld
(from llvm) doesn't like.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-15 06:42:02 -05:00
Yasushi SHOJI
6fc0d77432 arch: add big endian support
This patch adds Big Endian architecture support.  Even if a compiler
generating big endian object files is used, our linker script, or
include/linker/linker-tool-gcc.h to be precise, has default output
format as little endian.

This patch adds a hidden config CONFIG_BIG_ENDIAN, which should be set
by big endian architectures or a SoC's, and adds an condition to
switch OUTPUT_FORMAT in our linker.cmd.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
2018-10-10 09:28:05 -04:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Alberto Escolar Piedras
76f7644118 arch: native: Run Zephyr natively in a POSIX OS
A new arch (posix) which relies on pthreads to emulate the context
switching
A new soc for it (inf_clock) which emulates a CPU running at an
infinely high clock (so when the CPU is awaken it runs till completion
in 0 time)
A new board, which provides a trivial system tick timer and
irq generation.

Origin: Original

Fixes #1891

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-27 14:16:08 -05:00
Anas Nashif
1ff863c823 linker: use quotes with OUTPUT_ARCH macro
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 12:32:34 -04:00
Anas Nashif
397d29db42 linker: move all linker headers to include/linker
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-18 09:24:04 -05:00