This commit adds more information about the litex_vexrscv board
target, including references to related projects and instruction
about generating bitstream for the Digilent Arty A7-35T Board.
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
In newer OpenOCD version from Zephyr's SDK v0.12, there are some
changes in OpenOCD scripts: JTAG probe interface (AKA "adapter")
setup, see http://openocd.zylin.com/#/c/5784/
And so we need to change OpenOCD scripts accordingly to match
newer OpenOCD version from Zephyr's SDK v0.12.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
OpenOCD cofig command: ftdi_device_desc description provides the
USB device description (the iProduct string) of the adapter. And If not
specified, the device description is ignored during device selection.
In newer OpenOCD version from Zephyr's SDK v0.12, there are some
changes in OpenOCD scripts.
In file interface/ftdi/digilent-hs1.cfg, ftdi_device_desc will be set to
"Digilent Adept USB Device", while we get the iProduct string
"Digilent USB Device" from em_starterkit adapter. it's better not
specify it and only use the vid and pid of the adapter for selection.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
XIP (eXecute In Place) is a method of executing programs directly
from long term storage (i.e flash memory). It allows us to
avoid copying text it into RAM, saving writable memory for dynamic
data and not the static program code.
We don't have such non-volatile memory capable for executing in
place on HSDK so we load Zephyr image to DDR memory with debugger
each time.
Disable XIP option for HSDK as we don't need it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
On introduction of a "simplified" HSDK configuration where we only
use 2 cores out of 4 (in assumption that it will be working much
more reliably) we excluded a bit too much of details from OpenOCD script.
In particular we stripped not-used cores from JTAG chain description
which made OpenOCD quite unhappy:
----------------------------->8----------------------------
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 10000 kHz
Info : JTAG tap: arc-em.cpu2 tap/device found: 0x200c24b1 (mfg: 0x258 (ARC International), part: 0x00c2, ver: 0x2)
Warn : JTAG tap: arc-em.cpu2 UNEXPECTED: 0x200c24b1 (mfg: 0x258 (ARC International), part: 0x00c2, ver: 0x2)
Error: JTAG tap: arc-em.cpu2 expected 1 of 1: 0x200424b1 (mfg: 0x258 (ARC International), part: 0x0042, ver: 0x2)
Info : JTAG tap: arc-em.cpu1 tap/device found: 0x200824b1 (mfg: 0x258 (ARC International), part: 0x0082, ver: 0x2)
Warn : JTAG tap: arc-em.cpu1 UNEXPECTED: 0x200824b1 (mfg: 0x258 (ARC International), part: 0x0082, ver: 0x2)
Error: JTAG tap: arc-em.cpu1 expected 1 of 1: 0x200024b1 (mfg: 0x258 (ARC International), part: 0x0002, ver: 0x2)
Info : JTAG tap: auto0.tap tap/device found: 0x200424b1 (mfg: 0x258 (ARC International), part: 0x0042, ver: 0x2)
Info : JTAG tap: auto1.tap tap/device found: 0x200024b1 (mfg: 0x258 (ARC International), part: 0x0002, ver: 0x2)
Error: Trying to use configured scan chain anyway...
----------------------------->8----------------------------
That lead us to the situation when the target cores were programmed
in a wrong way effectively failing all tests. Fixing it now.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
During review of ARC port of OpenOCD some changes were requested
in particular:
1. L2 cache (SLC in ARC parlance) semantics, see
http://openocd.zylin.com/#/c/5688/
2. JTAG probe interface (AKA "adapter") setup, see
http://openocd.zylin.com/#/c/5784/
And so we need to change OpenOCD scripts accordingly to match
newer OpenOCD version from Zephyr's SDK v0.12.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
There are three groups of sensors on this board, each of which
requires a different I2C bus configuration and a different power
supply. Currently only the CCS811 is supported.
Change the board configuration to pull the necessary information about
the CCS811 supply switch from devicetree, and to supply power based on
whether the device is enabled in devicetree (rather than whether a
driver is selected). The implementation is designed to support
additional supply switches (there are at least six on the board, most
of which are dedicated).
Also document the I2C configuration necessary for the other sensors.
There is currently no way to select alternative configurations without
editing the devicetree binding, but at least they're available for use
in overlays.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This reverts commit 7492841dd1.
Enabling CONFIG_INTEL_VTD_ICTL on UP Squared board results
in tests and apps hanging. So revert this for now.
Relates to #30574
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Enable spi1 interface that connects to STM module SPBTLE-RFTR on the
stm32l562e_dk board.
Tested the configuration with st_ble_sensor sample + ST BLE Sensor
app on Android phone.
Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
Defines partitions that can be used by mcuboot on nucleo_h743zi board.
Please note that mcuboot is not yet supported on stm32 h7 family as the
write-block-size is greater than 8.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
In native_posix and nrf52_bsim add the cpu_hold() function,
which can be used to emulate the time it takes for code
to execute.
It is very similar to arch_busy_wait(), but while
arch_busy_wait() returns when the requested time has passed,
cpu_hold() ensures that the time passes in the callers
context independently of how much time may pass in some
other context.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The timer update was not triggering an immediate update of
the top HW models timer,
which meant a call to k_busy_wait() may have waited for a much
longer time than requested (up to 1 OS tick).
=> Fix it.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
for the signing procedures for boards an521, nrf5340, nrf9160,
nucleo_l552ze_q, and musca_b1.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
There is a GPIO driver for use with arty so enable the GPIO feature in
the board yaml to get some testing of it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the documentation of nRF5340 to stress that
TF-M is the default solution for building the Secure
image.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Extend the nRF5340 board's CMakeLists.txt file to
support building TF-M without BL2 for nRF5340. The
result of the build is a single merged-hex containing
TF-M (SPE) and Zephyr (NSPE).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Re-adjust the available RAM advertized by the nRF5340 DK
and PDK .yml files (Application core, Non-Secure version
of the board).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Modify the default partitioning of the Application core
SRAM, for Secure and Non-Secure domain, to accommodate
the default build configuration of TF-M. The RAM TF-M
uses should fit into the sram0_secure. The partitioning
should match what TF-M is allocating to secure and non-
secure domain.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building with TF-M support (for non-secure Zephyr
applications) default to build TF-M without BL2 support.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable building with TF-M by default on nRF5340 DK Application
core (cpuapp) when building for the non-secure version of the
board.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Rework the runner to improve various issues.
Every board.cmake file for an nRF SoC target is repeating boilerplate
needed for the nrfjprog runner's --nrf-family argument. The
information we need to decide the --nrf-family is already available in
Kconfig, so just get it from there instead. Keep the --nrf-family
argument around for compatibility, though.
This cuts boilerplate burden for board maintainers.
We also need to revisit how this runner handles recovery to fix it
in nRF53 and keep things consistent everywhere else.
To cleanly handle additional readback protection features in nRF53,
add a --recover option that does an 'nrfjprog --recover' before
flashing. Keep the behavior consistent across SoCs by supporting it on
those too. Because this is expected to be a bit tricky for users to
understand, check if a --recover is needed if the 'nrfjprog --program'
fails because of protection, and tell the user how to fix it.
Finally, instead of performing a separate 'nrfjprog --eraseall', just
give --chiperase to 'nrfjprog --program' process's arguments instead
of --sectorerase. This is cleaner, resulting in fewer subprocesses and
avoiding an extra chip reset.
Having a separate 'west flash --recover' option doubles the number of
test cases if we want to keep exhaustively enumerating them. That
doesn't feel worthwhile, so update the test cases by picking a
representative subset of the possibilities. Each test now has enough
state that it's worth wrapping it up in a named tuple for readability.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Defines partitions that can be used by mcuboot on nucleo_h743zi board.
Please note that mcuboot is not yet supported on stm32 h7 family as the
write-block-size is greater than 8.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.
The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
nsim_hs_smp has 2 cores, and CONFIG_MP_NUM_CPUS defalut value is 2.
But some tests will have extra config: CONFIG_MP_NUM_CPUS=1, so we
need to launch cores according CONFIG_MP_NUM_CPUS, not using a fix
number 2.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Instrs_per_pass option specify the number of instructions excuted
before simulator switches operations. the default value is 512. If we
specify a small value for it the debugger's overhead will increase
significantly for simulation because of the time taken to rapidly
switch operations. And the overhead will cause some time critical
task failure.
Restore instrs_per_pass value from 10 to default 512, we will have a
good sanitycheck result for nsim_hs_smp.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
The SAM4E/S SoC have a ROM bootloader named SAM-BA. Add bossac
to the board west runner list. This requires Zephyr SDK 0.12.0.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This enables the LiteX clock control driver for litex_vexriscv platform.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
SRAM base address and size are currently hardcoded in the defconfig.
This is wrong because symbols like KERNEL_RAM_SIZE and KERNEL_VM_BASE
are not currently being set. Fix this by adding the correct DTS entry.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Set building TFM with MCUboot. Set the build configuration to
profile_medium, we need smaller TFM images to fit into flash.
Build MCUboot, TFM, sign it, sign Zephyr NS image and merge all the
images. Also change the other configuration, BL2=OFF, to merge as a
single image.
Update documentation on how to flash the board.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Create a special configuration when BL2=OFF is set. DTS partitioning is
used for MCUboot, but does not match TFM's flash_layout.h configuration
when BL2=OFF, DTS matches when BL2=ON.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Refactor lpcxpresso55s69's partitions to match TFM's flash_layout.h
configuration. This matches TFM with MCUboot configuration.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
