This driver is setting the it8xxx2 register GCR1-15.
It's for selecting the pin function.
User would set pin at pinmux.c (under board/).
Signed-off-by: Cheryl Su <Cheryl.su@ite.com.tw>
This CL replaces all DT_ prefix with NPCX_DT_ for all macros used
for providing npcx device information in soc_dt.h It avoided the
ambiguity with the DT_ prefix for system DT macros/defines.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Following migration of all in-tree boards to device tree bindings
for SDMMC pins configuration, deprecate SDMMC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for I2S pins configuration, deprecate I2S related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for USB pins configuration, deprecate USB related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ETH pins configuration, deprecate ETH related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ADC pins configuration, deprecate ADC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for SPI pins configuration, deprecate SPI related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for I2C pins configuration, deprecate I2C related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for CAN pins configuration, deprecate DAC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate CAN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate (LP)U(S)ART related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for pwm pins configuration, deprecate PWN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix incorrect return value check when converting pinctrl
format to existing pin config format
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
CAN remaps were guarded by CMSIS defines which are always defined
for a given SoC.
Though under this control, we're using DT_ macros that expect
a certain node to be available, which otherwise leads to cmopilation
issue.
Align CAN node remap code on other peripherals code and check for
node availability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add const modifier for hal instances, clock devices pointer, and module
base address in npcx drivers to prevent driver functions change them
unexpectedly.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Based on pinmux data encoded in dt bindings some stm32f1 post
processing is required to eventually fit into data structures
expected in gpio_stm32_configure function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provides tool set to be used by device drivers in order to be able
to configure device signals.
This does not involve the implementation of a dedicated pinctrl
driver. In this regard, this is equivalent to implementation used
for treatment of current pinmux.c files.
Since STM32F1 uses a different GPIO configuration scheme, its
support is exlcuded for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update stm32_pin_configure prototype to use more appropriate
unsigned arguments
Additionally, fix documentation for z_pinmux_stm32_set function
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add additional pinmux definitions for I2C1 and I2C2 that are used
on the stm32f030 series SoCs. Additionally, correct the PF0 and PF1 I2C
functions, which were swapped.
Signed-off-by: Brian Kubisiak <brian@kubisiak.com>
* Add missing the PINMUX macros for UART5 pins.
* Correct a typo in STM32F1_PINMUX_FUNC_PC5_ADC12_IN15; the macro
used PC4 instead of PC5 for ADC12_IN15.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Replace npcx register base address type, uint32_t, with uintptr_t.
It is easier to know what type of base address and for linear
addresses treated as integral values.
This CL also modified IS_BIT_SET() macro function to fit MISRA code
guidelines.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add pin controller support for Nuvoton NPCX series
Add pin-mux controller support for Nuvoton NPCX series.
This CL includes:
1. Add pin controller device tree declarations and introduce alt-cells
to select pads' functionality.
2. Add npcx7-alts-map.dtsi since the mapping between IO and controller
is irregular and vary in each chip series.
3. Add nuvoton,npcx-pinctrl-def.yaml and its declarations to change all
pads' functionality to GPIO by default.
4. Pinmux controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This patch adds a pinmux driver allowing to configure the IOCON (I/O
control) registers found on the LPC11U6x MCUs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Fixed AF for USART 6 on PC6/PC7 PG8/PG9/PG12/PG13/PG14/PG15
All RTS/CTS/RX/TX pins now have correct AF7 instead of wrong AF8.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.
Several minor pinmux errors have also been fixed.
Sorted by Alternate function.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
