Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The max-value should just be an int and not an array. Change the type
to 'int' in the binding and fixup the driver to match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines. Replace dts_fixup.h use
for DT_RTC_0_NAME with DT_INST_0_NXP_KINETIS_RTC_LABEL to be
consistent. Also, remove the aliases that had been used for this
driver in various nxp_k*.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines and remove Kconfig per instance
enablement in favor of DT_INST_ define existing. Also, remove the
aliases that had been used for this driver in nxp_rt.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert pms7003 sensor driver to utilize device tree.
DTS would look something like the following for the pms7003:
uart {
pms7003: pms7003 {
status = "okay";
compatible = "plantower,pms7003";
label = "pms7003";
};
};
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert ak8975 sensor driver to utilize device tree.
This also supports the ak8975 embedded in a invensense MPU9150. In such
a case the device tree node should look something like, where the ak8975
is a child of the mpu9150.
mpu9150@68 {
compatible = "invensense,mpu9150";
reg = <0x68>;
label = "mpu9150";
#address-cells = <1>;
#size-cells = <0>;
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0xc>;
label = "ak8975";
};
};
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32g0 SoC. Enable the independent watchdog
for the stm32g0 series for use with this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
On stm32f302/3 series, USB and CAN_1 share same IRQ lines.
To use USB and CAN_1 together, USB IRQ could be remap to other
line numbers, on which there is no conflict.
Remap the USB IRQ lines by default:
-Assign remap number in matching dtsi files
-Perform remap before usb driver init
Additionally, fix compilation issue in usb driver.
Fixes#22343
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
List the details for each type in the order they appear in the summary
of all types. Add the missing 'path' value to the summary.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Fix the following device tree warnings:
unit-address and first reg (0x20000) don't match for iccm@0
unit-address and first reg (0x80010000) don't match for dccm@80000000
Since the em_starterkit_em7d_normal has a different base address for
iccm & dccm, and most of the em_starterkit variants have different sizes
for iccm & dccm. Just define the nodes in the specific
em_starterkit*.dts file and remove them from emsk.dtsi. This removes
the issue reported in the warning.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since there are times that we include a base .dtsi file and change the
reg address we tend to end up with warnings that the reg address and
unit-address don't match. To handle this introduce a simple DT_ADDR(x)
macro that will prepend '0x' to a 'unit-address' style address.
#define DCCM_ADDR 80000000 /* in unit-address format */
dccm0: dccm@DCCM_ADDR {
reg = <DT_ADDR(DCCM_ADDR) 0x1>;
...
};
This allows the dts file to override the value of DCCM_ADDR and than to
have the unit-address of the node and the reg address match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Create an SoC definition for the Audio DSP on Intel Apollolake
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds a simple binding for the Cadence Tensilica Xtensa LX4
CPU. File originally from the LX6 binding.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Convert to support devicetree.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Mark all CC2520 GPIOs as required
in binding.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update the lora/sx1276 driver to the new GPIO API, using configured
active level and the replacement interrupt and active-sensitive set
APIs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Document and assign write-protect signal as active low, and use the
active-sensitive API to control it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update devicetree sources and bindings, switch to new GPIO API. Use
devicetree property name to identify interrupt signal.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API. Update all
devicetree bindings to add INT signal active level. Document active
level.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update sample overlays. Add GPIO flags to configuration state.
Refactor to split out setup/handle/process phases. Switch to new API
replacing callback dis/enable with interrupt dis/enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The offset and the number of pins were swapped causing an error when a
64-position left shift was generated to calculate the pin mask.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since this was converted to the setup/handle/process idiom in master
the conversion is straightforward.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
