It's more natural to use net_buf_pull_mem() for the HCI command
parsing. Note that this also fixes a bug in hci_cmd_handle() where it
would previously check for sufficient parameter length with the
command header still included in the buffer (which it shouldn't have
been).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This is the same as net_buf_pull(), except that instead of returning
the new buf->data it returns the old buf->data. This was recently
discussed in github issue #12562.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Correct the names of the binding files, so they comply
with binding file naming nomenclature.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes a binding .yaml file for Nordic nRF
SPU peripheral and defines the macro for the peripheral base
register address in file ext/hal/nordic/nrfx_config_nrf9160.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The app is already sending period heart beat messages, and since it is
not designed to be used for such long times that would require IVI
Update, keep the secure network beacon sending disabled.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Suspend the mesh network after 30 minutes of inactivity. This should
help prolong the battery life of boards used at multi-day events, if
the user forgets to power off the device for the night.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Sending a model publication message could fail e.g. if there are no
buffers available, however this doesn't mean that we should stop doing
periodic publishing indefinitely. When an error occurs, make sure to
call the publish_sent() function so that the periodic publishing timer
gets resubmitted if necessary.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
In some cases the Friendship & Low Power Node features aren't
available or feasible, however power saving is nevertheless required.
This patch introduces two new APIs to suspend and resume the Mesh
network. Currently, what this impacts is the LE scanning, the
ability to allocate new outgoing buffers, as well as the model
publishing, beacon and heartbeat timers.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Tracking of the BT_MESH_VALID flag and the PB-GATT state was rather
fragile. Add proper error returns to the various GATT service enable &
disable handlers, and toggle the BT_MESH_VALID flag in a single file
(main.c). Use the newly added error returns to ensure that we don't
re-enable PB-GATT if it wasn't already enabled from before.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There's already a flags member in the bt_mesh context, so take
advantage of that for any boolean members that have so far been
bit-fields. This should produce more efficient code, also for the
sequence number that's now its own u32_t.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Docs in the samples folder are a mixture of samples and sample indexes
of more samples, cluttering the index display. This change eliminates
the clutter, be we should reorganize the sample docs so we have a
consistent doc hierarchy (and improved organization).
Fixes: #12758
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add missing -lgcc when compiling with ZEPHYR_TOOLCHAIN_VARIANT=host
merely copying some existing code from
'compiler/{clang,gcc}/target.cmake'.
This fixes compilation for the following boards with an x86
microprocessor:
galileo, minnowboard, qemu_x86, qemu_x86_nommu, up_squared,
up_squared_sbl
Compilation of the following boards with an X86_IAMCU microcontroller
still fail with a "cannot find -lgcc" error:
arduino_101, qemu_x86_iamcu, quark_d2000_crb, quark_se_c1000_devboard,
tinytile
This is _not_ a regression because these boards _already_ failed with
"undefined reference to __udivdi3" and other libgcc symbols.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This fixes the following error on all x86 BOARDs (qemu_x86,
galileo,... see "make usage" for the complete list) when compiling
assembly files with ZEPHYR_TOOLCHAIN_VARIANT=host:
cc1: error: CPU you selected does not support x86-64 instruction set
This also fixes the following error when compiling minnowboard,
up_squared and up_squared_sbl boards with ZEPHYR_TOOLCHAIN_VARIANT=host:
cc1: error: -mpreferred-stack-boundary=2 is not between 3 and 12
This fix alone is not enough to compile any of these boards; however it
moves compilation much further to the next, unrelated failure(s),
namely: 'undefined __udivdi3' and other libgcc symbols for all x86
boards; + some other, additional issues for some boards. See next
commit.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Add missing linker section to avoid warning about orphans when building
with host compiler.
Fixes#12719
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
A comment which had been copied straight from the native_posix
board refered to the nrf52_bsim board as native_posix,
which it is not, and may confuse users.
Fix it.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
We'd get output from a cmake build that would have lines like:
Version: DTC 1.4.7
Version: DTC 1.4.7
This was a side effect of check_dtc_flag. Add the OUTPUT_QUIET option
to execute_process to supress this output.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change fixes problem with mutexes and initialization for SystemView,
adds config options to:
- choose if SystemView should start logging events on system start
- select SystemView RTT buffer size
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Moved UART interrupt dependencies from concrete driver to
the modem receiver as it uses UART interrupt functions within.
This allows developing other UART interrupt based modems without
the need to depend on the aforementioned features explicitly.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
The script looks for CONFIG_3RD_LEVEL_INTR_xx_OFFSET while
the config is actually CONFIG_3RD_LVL_INTR_xx_OFFSET.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Several places in the code have constructions like this:
if (bool_variable) {
atomic_set_bit(flags, FLAG);
} else {
atomic_clear_bit(flags, FLAG);
}
To reduce the amount of code for such situations, introduce a new
atomic_set_bit_to() helper which lets you condense the above five
lines to a single one:
atomic_set_bit_to(flags, FLAG, bool_variable);
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
When compiling NVS with NEWLIB_LIBC=y, GCC outputs the following
warning:
In file included from $ZEPHYR/include/logging/log.h:11:0,
from $ZEPHYR/subsys/fs/nvs/nvs.c:17:
$ZEPHYR/subsys/fs/nvs/nvs.c: In function 'nvs_init':
$ZEPHYR/subsys/fs/nvs/nvs.c:748:10: warning: format '%lx' expects
argument of type 'long unsigned int', but argument 3 has type 'u32_t
{aka unsigned int}' [-Wformat=]
LOG_INF("alloc wra: %d, %" PRIx32 "",
^
fs->ate_wra and fs->data_wra are both defined as u32_t, so they need to
be printed with '%d'.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add a project configuration for nrf52840_pca10090 that will
route the nRF9160 interface pins to the nRF52840, and use them
for HCI over UART.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Add support for nrf52840_pca10090, i.e. the nRF52840 SoC on the
pca10090 development kit. The SoC is tasked to route some of the
nRF9160 pins to different components on the development kit.
Additionally, it can be used as a Bluetooth HCI device.
The routing options appear under "Board config" in Kconfig.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
In soc.h of nRF9160 SoC we need to explicitly include
nrfx_config_nrf9160.h to have the standard peripheral
base address macro mappings in Zephyr builds for nRF9160
SoC. (We need to do this spefically for nRF9160, as those
macros are not present in the nRF9160 MDK header).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Assigning code-owner for Nordic Semiconductor nRF9160_pca10090
development board, featuring nRF9160 and ARMv8-M core with
ARM TrustZone-M.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the initial documentation information
for board nrf9160_pca10090.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes the Kconfig and DTS board definition
files for nrf9160_pca10090ns board. This Zephyr board shall be
used to build Non-Secure Zephyr applications on nrf9160_pca10090
Dev Kit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes the Kconfig and DTS files for the
nrf9160_pca10090 board definition. The nrf9160_pca10090 board
shall be used to build Zephyr applications, running in Secure
mode, on nRF9160_PCA10090 Dev Kit.
Additionally, the commit introduces a default Secure and
Non-Secure flash partition configuration for the
nRF9160_PCA10090 board, allowing to use Zephyr for building
both the Secure and Non-Secure firmware images.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This board directory supports the RV32M1 Vega board when targeting
a RISC-V CPU core on the main SoC.
Currently, only RI5CY support is provided via the rv32m1_vega_ri5cy
board name.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.
As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
This provides a HAL for the OpenISA RV32M1 SoC.
Origin: open-isa-rv32m1 GitHub organization
URL: https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv
Revision: 365b1060f0947d5250c07b3eebdbc9e54cd0246e
Maintained-by: External
License: BSD-3-Clause
Signed-off-by: Marti Bolivar <marti@foundries.io>
Borrow from an Arm Cortex-M convention where each Kconfig.soc can
define a 'config WDOG_INIT' that does watchdog initialization early in
the boot process if that SoC needs it.
Some SoCs have watchdogs that are enabled by default and need to be
turned off during reset handling (to be re-enabled if necessary by a
Zephyr watchdog driver).
Signed-off-by: Marti Bolivar <marti@foundries.io>
A couple of follow-on patches suggested after previous RISCV32 arch
changes were merged.
Tweak some help in arch/riscv32/kconfig to better work with the RST
docs.
Take out all the CONFIG_PRINTK ifdeffery in fatal.c. The cause_str()
routine should get compiled out if PRINTK=n anyway.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".
Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.
Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.
Signed-off-by: Marti Bolivar <marti@foundries.io>
A GCC-based toolchain may require additional, toolchain-specific
values in CMAKE_REQUIRED_FLAGS to perform compiler checks properly,
but gcc.cmake clobbers any values the user provides.
Preserve them instead, allowing users to give their own compiler
checking flags at generation time.
The details for the particular issue that inspired this are described
in https://github.com/pulp-platform/pulpino/issues/240.
Signed-off-by: Marti Bolivar <marti@foundries.io>
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.
Fixes#11394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
