Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Since the driver is the only one needing those, no need to expose them
anywhere.
Change-Id: Iac4eaa65a9dbdaa8e72c70ea0de35cd2b3d836d1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This was failing, the documentationg provides numbers only telling at
one places these are hexadecimal values. So switching to hexadecimal.
Then DDS rate retrieving macro was bogus, so fixing it.
And adding debug output about the DDS rate and the clock ratio.
Change-Id: I9cc414796fbd7f7123f1f406c6bce7ffacf641e8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is specific to Galileo board where its SPI port 0 needs to setup
the CS pin through a GPIO pin.
Change-Id: I9df6f7144a96bcd10f61fc7d057f89caa0e599d1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Without it, it won't go through a pci scan, and will just trust the
pre-set information for the bus/dev/function to enable the memory
mapped registers.
Change-Id: Ica9156be541619dce9684dd45f70e05b69782a7c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such controllers are found in Quark's X1000 series, and thus are found
on Galileo boards v1 and v2.
Change-Id: Ib71486c9f27de1b6c48ce3cb3dd138d69833c2ea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
