Introduce BOARD_NRF9160_PCA10090NS to differentiate between
secure and non-secure board variants.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
When selecting BT we need to select BT_CTRL for most bluetooth
samples to work correctly.
Let's fix that in the board files.
Fixes the following error when CONFIG_BT is selected:
zephyr/drivers/bluetooth/hci/h4.c:463:30:
error: ‘CONFIG_BT_UART_ON_DEV_NAME’ undeclared (first use in
this function)
h4_dev = device_get_binding(CONFIG_BT_UART_ON_DEV_NAME);
^~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Michael Scott <mike@foundries.io>
Enable the SPI driver on the HiFive 1
This makes the following configurations choices for the HiFive 1:
The SPI 0 peripheral driver is not enabled by default because it is in
charge of mapping the SPI flash into memory. This can be configured
using the CONFIG_SIFIVE_SPI_0_ROM KConfig option.
The SPI 1 peripheral driver is enabled by default and the pinmux is
configured for all of its outputs
The SPI 2 peripheral driver is enabled by default because it is present
in the DTS for the FE310, but because the QFN48 package used on the
HiFive 1 doesn't route those pins from the silicon die, the pinmux can't
enable the SPI 2 pins.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Indicate that PWM is supported on several Nordic DK boards so that
the pwm_nrf5_sw and pwm_nrfx drivers are covered by CI builds.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable HW PWM driver instead of the SW one on nRF SoCs where the PWM
peripheral is present.
Default PWM instances are also enabled on Nordic DK boards so that it
is possible to build the basic fade_led sample for them without extra
adjustments.
After the above changes are applied, some configuration alterations
in basic samples blink_led and fade_led become no longer needed.
These are removed. And the blink_led sample is corrected so that it
works with the nRF HW PWM driver as well.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.
PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.
Remove the old style 32-bit tables to make the x86 port
easier to maintain.
Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Indicate that watchdog is supported on several Nordic DK boards
so that the wdt_nrfx driver is covered by CI builds.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Changes the default code location from internal itcm to external qspi or
hyperflash. Changes the default data location from internal dtcm to
external sdram.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Changes the default code location from internal itcm to external qspi.
Changes the default data location from internal dtcm to external sdram.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new configuration option to mimxrt10{20,60,64}_evk boards to link
data into external sdram. The default remains to link data into internal
data tightly coupled memory (DTCM).
Note that mimxrt1050_evk is not included because it already has support
for linking data into sdram.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Unlinke nucleo or disco boards, ST-Link Tx/Rx pins used for Virtual
Com Port is not connected to the chip.
Then, console is not available by default and one should use a serial
cable to enjoy console. Adding mention of this fact to the board
documentation and replacing default hello_world example by blinky,
since blinky sample works without any additional hardware.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Somehow these were getting generated as `FLASH_foo_BLOCK_SIZE` even
though there's no specification for them in the original yaml. Put them
back until we can figure out what's going on.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In #9717, 777407b9ea
coverage support was broken for all NATIVE_APPLICATION except
native_posix
This includes the nrf52_bsim board
Fix it.
Fixes: #13009
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The disco_l475_iot1 board should be using CONFIG_USB_DC_STM32 as the
Kconfig sybmol.
Also fix a minor typo in a comment in nucleo_f207zg with regards to
CONFIG_USB_DC_STM32
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
From the driver point of view, monochrome controllers from the ssd16xx
family mostly differ by the amount of row and columns that are
supported. If they support more than 256 rows and/or columns the
corresponding size or position is sent using 2 bytes instead of 1 byte.
This patch therefore adds the width-bits and height-bits DT properties
to make this configurable.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that stm32 watchdog should be configured by device tree,
update dts file of boards declaring watchdog support.
Additionally update doc and yaml files.
Add support on some boards that were used to validate the driver
update:
- disco_l475_iot1
- nucleo_f207zg
- nucleo_f429zi
- nucleo_f746zg
- nucleo_f073rz
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert the hci_spi sample to get the SPI and GPIO settings from Device
Tree instead of Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert the HCI SPI driver to get the SPI and GPIO settings from Device
Tree instead of Kconfig. The "zephyr,bt-hci-spi" binding is used as
a common one for this purpose ("st,spbtle-rf" is removed), to take
advantage of the new DT_<COMPAT>_<INSTANCE> generated macros and get
rid of related fixups and aliases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that all supported xtensa boards use DTS we can move the Kconfig
setting to the arch level. Remove HAS_DTS from board Kconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The dts files on these boards had some CONFIG_ defines related to which
memory should be used to hold code. We move this choice out of DTS and
back into Kconfig.
As such, we removed the default setting of 'zephyr,flash' and just
map
CONFIG_CODE_ITCM to:
DT_NXP_IMX_RT_ITCM_0_SIZE
DT_NXP_IMX_RT_ITCM_0_BASE_ADDRESS
CONFIG_CODE_{QSPI,HYPERFLASH} to:
DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1
DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDDRESS_1
for the mimxrt1050_evk, we remove the default setting of 'zephyr,sram'
and just map:
CONFIG_DATA_DTCM to:
DT_NXP_IMX_DTCM_0_SIZE
DT_NXP_IMX_DTCM_0_BASE_ADDRESS
CONFIG_DATA_SDRAM to:
DT_MMIO_SRAM_80000000_SIZE
DT_MMIO_SRAM_80000000_BASE_ADDRESS
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the how enabling of CONFIG_XIP impacts CONFIG_FLASH_SIZE and
CONFIG_FLASH_BASE_ADDRESS to Kconfig instead of dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As we want to remove dts dependency on Kconfig, we had a case based on
CONFIG_BOOTLOADER_MCUBOOT. From a DTS point of view that was just
getting the chosen property 'zephyr,code-partition' set. We can easily
move this to the actual dts files and remove the mcuboot.overlay.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit implements a CTF-backend for Zephyr's tracing API.
The CTF-backend itself is split in a middle-layer and a bottom-layer.
- Middle-layer decides the payload in event transactions,
- Bottom-layer implements the IO transport.
A simple POSIX bottom-layer is provided so far.
Signed-off-by: François Delawarde <fnde@oticon.com>
Change compatible, move the JEDEC ID from Kconfig to DTS, convert DTS
size from bytes to bits, remove unreferenced DTS properties. Remove DTS
fixups.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
All Particle mesh devices have an on-board 32 Mibit JEDEC-compatible
flash from GigaDevice. Add bindings to access it.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use auto-generated device tree macros in LPS25HB driver to avoid
usage of dts.fixup code for it.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use auto-generated device tree macros in LSM6DS0 driver to avoid
usage of dts.fixup code for it.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Previously, only led0 was enabled.
This allows the samples/basic/disco sample to build/run for
this board.
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Convert usb_dc_stm32 driver GPIO disconnect to use new defines so we
can remove the dts_fixup.h code for it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
