Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Definition of obsolete FLASH_PAGE_SIZE Kconfig symbol was
remaining in STM32F3 soc files.
Clean these.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
stm32mp1 was adding a STM32 specific Core selection Kconfig
symbol while zephyr generic CPU_CORTEX_M4 could be used for the
same purpose.
Remove STM32 specific symbol and use generic one.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32WB HCI driver requires definition of 2 RAM regions to support
use of 3 shared memory sections: MAPPING_TABLE, MB_MEM1 and MB_MEM2.
In linker.ld, under conditions of HCI driver to be enabled,
define SRAM1 and SRAM2 based on input defined in stm32wb linker.
Then define the 3 sections MAPPING_TABLE, MB_MEM1 and MB_MEM
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
soc_register.h is available in most of stm32 series.
It is sometime empty or contains includes to flash_registers.h,
which is included directly with direct reference in flash driver.
soc_register.h is also included in stm32 clock drivers, but this
driver do not use direct reference to any register anymore.
Clean up these files.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In kernel_arch_init() we initialize the ARM core (interrupt
setup, fault init, etc.) so we can also move z_clearfaults()
in the same function and skip invoking it in the SoC init
functions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Hex firmware file is convenient in some scenarios, like
generating signed firmware with `west sign`. So, enable
generating hex file.
Signed-off-by: Jun Li <jun.r.li@intel.com>
This commit adds driver support for ADC1 on all 8 supported series of
stm32 with resolution and conversion time selection and calibration.
Currently DMA is not supported for all series, and without it, zephyr
won't be able to catch up ADC's end of conversion interrupt, so this
version of the driver supports one channel conversion only. Users want
multi-channel conversion should use multiple sequences in their app
code.
This driver uses LL lib rather than HAL because the current HAL lib for
ADC will call HAL_DMA_* functions rather than using zephyr's common DMA
interface, so that way the driver will break the consistency of the
code.
This driver has been tested on multiple nucleo boards including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all
passed the test cases in tests/drivers/adc/adc_api. If the external ADC
line is floating, it may fail the tests since ADC may get 0V and the
test cases think 0 is failing. Connect it to any voltage source between
0-3.3V will help passing the test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit renames the symbol CPU_HAS_SYSTICK to
CPU_CORTEX_M_HAS_SYSTICK, to look similar to all
other CPU_CORTEX_M_HAS_ options, and moves the
K-config symbol definition from arm/core/Kconfig to
arm/core/cortex_m/Kconfig.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
ARM SysTick timer is implemented by default in ARMv7-M
and Mainline ARMv8-M processors, so we include the
corresponding Kconfig symbol in arch/arm/core/cortex-M/Kconfig
and remove the selections from the Cortex-M SOCs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.
Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.
Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):
For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Allows to enable initial RTS/CTS hardware flow control
in the dts.
Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.
Also fixes syntax error caused by a missing );.
Signed-off-by: Josef Gajdusek <atx@atx.name>
