Commit Graph

70 Commits

Author SHA1 Message Date
Martin Åberg
152d3e46ad soc/riscv: add the QEMU "RISC-V VirtIO board"
The QEMU RISC-V VirtIO board is capable:
- 8 x CPU
- 256 MiB RAM
- PMP
- PCI
- ISA string: RVnnIMAFDCSU
  - mul/div
  - FPU with double precision
  - MMU
  - Compressed instructions

Devicetree was extracted from QEMU as described in virt.dtsi.
The same .dtsi SOC description is used for 32-bit and 64-bit.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
Tim Lin
981166eb8e drivers/i2c: add i2c driver on it8xxx2 platform
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-01-15 11:22:57 -05:00
Tim Lin
8f4692083c soc/riscv: correct the name of the register
correct the name of bit5 of GCR2 register from SMB4E to SMB3E.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-01-15 11:22:57 -05:00
Cheryl Su
46efefbbe5 soc/riscv: it8xxx2 soc system
A new platform soc for it8xxx2.
Revising the test/kernel/context/src/main.c for it8xxx2 test case.

Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-12-16 08:47:36 -05:00
Anas Nashif
e0f3833bf7 power: remove SYS_ and sys_ prefixes
Remove SYS_ and sys_ from all PM related functions and defines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Alexandre Mergnat
542a7fa25d arch: riscv: add memory protection support
The IRQ handler has had a major changes to manage syscall, reschedule
and interrupt from user thread and stack guard.

Add userspace support:
- Use a global variable to know if the current execution is user or
  machine. The location of this variable is read only for all user
  thread and read/write for kernel thread.
- Memory shared is supported.
- Use dynamic allocation to optimize PMP slot usage. If the area size
  is a power of 2, only one PMP slot is used, else 2 are used.

Add stack guard support:
- Use MPRV bit to force PMP rules to machine mode execution.
- IRQ stack have a locked stack guard to avoid re-write PMP
  configuration registers for each interruption and then win some
  cycle.
- The IRQ stack is used as "temporary" stack at the beginning of IRQ
  handler to save current ESF. That avoid to trigger write fault on
  thread stack during store ESF which that call IRQ handler to
  infinity.
- A stack guard is also setup for privileged stack of a user thread.

Thread:
- A PMP setup is specific to each thread. PMP setup are saved in each
  thread structure to improve reschedule performance.

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
2020-11-09 15:37:11 -05:00
Daniel Leung
8a79ce1428 riscv: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Pawel Czarnecki
82acea40b3 soc: riscv: litex-vexriscv: change CSR accessors
Do not assume `reg_size` to be a multiple of 4 and
divide it on each call, expect the caller to provide
an already divided value instead.

This change require the LiteX GPIO driver to be modified,
which will come in the following commit.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-10-02 11:36:16 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Anas Nashif
ce59510127 arch: xip: cleanup XIP Kconfig
unify how XIP is configured across architectures. Use imply instead of
setting defaults per architecture and imply XIP on riscv arch and remove
XIP configuration from individual defconfig files to match other
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-07 09:50:22 -04:00
Karsten Koenig
2e61137cc9 arch: riscv: thread: Init soc context on stack
The optional SOC_CONTEXT carries processor state registers that need to
be initialized properly to avoid uninitialized memory read as processor
state.
In particular on the RV32M1 the extra soc context stores a state for
special loop instructions, and loading non zero values will have the
core assume it is in a loop.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2020-07-13 15:00:19 -05:00
Karsten Koenig
dc725b7451 soc: riscv: rv32m1: Fix optional context save
Saving an extended context for RV32M1 should be optional, but it was
broken due to the offset calculation not taking the according option
into account.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2020-07-13 15:00:19 -05:00
Stephanos Ioannidis
3322489d22 config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET
The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between
the beginning of the ROM area and the address of the first ROM section.

This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because
the first ROM section is not always the `.text` section.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-07-09 14:02:38 -04:00
Kumar Gala
9ca541a504 linker: Remove deprecated Kconfig options related to linker scripts
Remove Kconfig, linker script, and related bits associated with
CUSTOM_RODATA_LD, CUSTOM_RWDATA_LD, CUSTOM_SECTIONS_LD,
SOC_NOINIT_LD, SOC_RODATA_LD, and SOC_RWDATA_LD options that have been
deprecated since Zephyr 2.2.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-12 11:14:28 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Jakub Cebulski
7f6dbccba8 soc: litex: Add function for reading 64bit CSRs
This adds a helper function for reading LiteX 64-bit CSRs
to be used by LiteX drivers.

Signed-off-by: Jakub Cebulski <jcebulski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-26 21:43:30 +02:00
Martí Bolívar
6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Kumar Gala
fdd85d5ad7 dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 05:25:41 -05:00
Kumar Gala
52a950bbe6 soc: riscv: openisa_rv32m1: Conver to new devicetree macros
Convert DT_CODE_PARTITION_{OFFSET,SIZE} to use new
DT_REG_ADDR/DT_REG_SIZE macros instead based on
DT_CHOSEN(zephyr_code_partition).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 09:23:32 -05:00
Kumar Gala
339e3f79eb riscv: linker: replace DT_FLASH_{BASE_ADDRESS,SIZE} with new macros
The riscv linker scripts utilize DT_FLASH_BASE_ADDRESS and
DT_FLASH_SIZE, as we want to phase out the old generator we need to
replace these defines with macros from devicetree.h.

We support two flash configurations at this point, either a QSPI flash
like on the hifive board or a SoC flash like on the rv32m1_vega.  We
update the linker scripts to check the compat of the zephyr,flash node
and based on if its 'jedec,spi-nor' or 'soc-nv-flash' we determine how
to extract the "flash" base address and size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 09:23:32 -05:00
Kumar Gala
0cc76d75e2 soc: openisa_rv32m1: Remove dts_fixup.h
Remove dts_fixup.h file as the defines in there aren't used anymore.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-30 17:42:23 -04:00
Kumar Gala
5a31ee2175 soc: riscv: openisa_rv32m1: Convert to new dts macros
Convert from DT_OPENISA_RV32M1_INTMUX_INTMUX_LABEL to
DT_LABEL(DT_INST(0, openisa_rv32m1_intmux)).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-29 08:03:24 -05:00
Kumar Gala
43a7d26603 drivers: entropy: replace CONFIG_ENTROPY_NAME with DT macro
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL.  We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.

This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h.  Also
remove any other stale ENTROPY related defines in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-13 09:14:21 -05:00
Kumar Gala
977cd7b588 soc: riscv: openisa_rv32m1: Add helper to get clock_ip_name from dts
Add a helper macro that will go from a DT_DRV_INST number and return the
clock_ip_name value for that instance.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala
b263a3379c soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.

Also rename various node labels to match the SoC docs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala
0be9d2b18d drivers: entropy: rv32m1_trng: Add DTS support to rv32m1_trng driver
Add a YAML, DTS node and driver support to utilize data from devicetree
for register address and driver name.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-02 09:30:58 +02:00
Kumar Gala
a92d61a316 soc: litex: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-30 12:49:43 -05:00
Jaron Kelleher
c6fd99d048 api: irq: Add Multi-level IRQ utility functions
This adds utility functions to irq.h in accordance with zephyr's
multi-level irq numbering schema. Functions that are added will
get the zephyr IRQs level and provide function to return the
interrupt number at a particular level.

Fixes issue #20338

Signed-off-by: Jaron Kelleher <jkelleher@fb.com>
2020-03-28 07:12:30 -04:00
Kumar Gala
8e65c69bb4 soc: sifive: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 16:06:09 -05:00
Kumar Gala
4372efe4ef drivers: uart: miv: convert to DT_INST defines
Convert driver to fully use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 16:37:22 -06:00
Kumar Gala
61d30ed927 drivers: intc: plic: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Ulf Magnusson
378d6b137a kconfig: Replace non-defconfig single-symbol 'if's with 'depends on'
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.

Will do the defconfigs separately in case there are any complaints
there.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:34 -06:00
Ulf Magnusson
a42a42cd5a kconfig: Replace defconfig singe-symbol 'if's with 'depends on'
Same deal as in commit eddd98f ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for all symbols defined within defconfig
files. See that commit for an explanation.

Maybe 'if's were used originally to mirror the 'if's in the main Kconfig
files, and then it got copied around by people assuming 'if' must work
differently from 'depends on'. It doesn't match in every spot at least.
Better to keep it simple and just consistently use 'depends on' when
it's a single symbol/choice I think. Helps reinforce that 'if' isn't
magic too.

Verified by printing all Kconfig menu nodes (symbols, choices, menus,
etc.) before and after the change and diffing (should show no
difference).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:13 -06:00
Ulf Magnusson
c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Anas Nashif
73008b427c tracing: move headers under include/tracing
Move tracing.h to include/tracing/ to align with subsystem reorg.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 15:58:05 -05:00
Robert Winkler
e8d0eb1db1 drivers: gpio: Add LiteX GPIO driver
This commits adds GPIO driver for LiteX SoC builder.

Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2020-02-05 12:00:36 +01:00
Øyvind Rønningstad
05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ulf Magnusson
4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Henrik Brix Andersen
b702e5fdde soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver
Enable the driver for the Timer/PWM (TPM) module present in the
OpenISA RV32M1 when PWM is enabled.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Henrik Brix Andersen
f3144644bd soc: riscv: rv32m1: enable peripheral clocks for Timer/PWM modules
Enable the peripheral clocks for the OpenISA RV32M1 Timer/PWM (TPM)
modules.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Henrik Brix Andersen
ce9141236b modules: vega: add option for indicating the presence of RV32M1 TPM
Add Kconfig option for indicating that a given SoC contains the
OpenISA RV32M1 Timer/PWM module (TPM).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Ulf Magnusson
def1f0e2d5 devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).

Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.

The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.

It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.

Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-07 17:19:36 +01:00
Olof Johansson
3b733b5282 interrupt_controller: plic: use shared symbol for DT_*
miv already had it defined, but let's shorten the names and use
them in the driver. This also adds it for sifive-freedom.

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 13:28:21 -05:00
Olof Johansson
a6b3b616f5 riscv: use standard MSTATUS
This is no longer needed, since all in-tree platforms are only using
the standard mstatus formats. Remove it to avoid the complexity.

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 13:27:45 -05:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Øyvind Rønningstad
8531c7cb44 riscv: linker.ld: Port vector table to zephyr_linker_sources()
Put it in its own linker file snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
0b2c8e201c arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET
to its own linker file snippet so snippets can be placed before it.
Using zephyr_linker_sources().

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
d1c2a4edbf cmake: Add the TEXT_START location to zephyr_linker_sources()
Places linker code at or near the beginning of the text section.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Ulf Magnusson
fdb936adae openisa_rv32m1: kconfig: Remove base address/size symbols
RISCV_RV32M1_VECTOR_BASE_ADDR is unused after commit 34b0516466
("boards: riscv32: rv32m1_vega: enable MCUboot for ri5cy core") (it was
called RISCV32_RV32M1_BASE_ADDR then).

RISCV_RV32M1_VECTOR_SIZE is still used, but is always 0x100, so remove
it too.

These symbols were only defined in a Kconfig.defconfig file.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 12:44:47 -06:00
Ulf Magnusson
90b9eb3a9e kconfig: Rename USE_CODE_PARTITION to USE_DT_CODE_PARTITION
USE_CODE_PARTITION is a bit vague as a symbol name ("use code partition
how?"). Rename it to USE_DT_CODE_PARTITION to make it clearer that it's
about devicetree.

This would break any third-party configuration files that set it, but
it'll generate an error since kconfig.py promotes warnings to errors, so
it's probably not a big deal.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-09 16:40:24 -05:00