IRQ_CONNECT() was being expanded with the IRQ line for the first device
twice, causing spurious IRQs.
Should fix#4398.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Supports both master and slave mode, standard and fast modes,
configurable timeouts, and a few other tunable settings.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Cleanup I2C drivers to not use bitfield access for config information
and instead use accessor macros that use shifts & masks. This is
cleanup towards removing the bitfield access in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I2C device drivers which support DTS have their default boot
configuration provided by DTS. The legacy I2C_x_DEFAULT_CFG
option in Kconfig is no longer required. This patch hides
this option from the Kconfig menu for I2C device drivers which
support DTS.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The compilation of the i2c_ll_stm32 fails when we
enable the interrupt mode. The struct i2c_stm32_data
is needed to initialize the semaphore. This patch adds
the missing struct for interrupt mode.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add _i2c_map_dt_bitrate() that maps from a bitrate to the I2C zephyr
cfg bit fields used in i2c_configure().
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch fixes the read operation of the I2C driver
for all the receptions (1-byte, 2-bytes, N-bytes when
N > 2)
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Martin Iñaki Malerba <inakimmalerba@gmail.com>
In interrupt mode, the drivers entered a forever loop if the
I2C_MSG_RESTART flag was set. This patch fix this issue.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The EVENT interrupt is generated when:
– SB = 1
– ADDR = 1
– ADD10= 1
– BTF = 1 with no TxE or RxNE event
– TxE event to 1 if Buffer interrupt enabled
– RxNE event to 1 if Buffer interrupt enabled
We need to disable and enable the Buffer TxE and RxNE interrupt
inside the EVENT ISR. The LL_I2C_{Enable,Disable}IT_TX and
LL_I2C_{Enable,Disable}IT_RX functions, used now, enable and
disable both Buffer and Event interrupt. This patch uses the
LL_I2C_EnableIT_BUF and LL_I2C_DisableIT_BUF functions to
enable and disable the Buffer interrupt (TxE, RxNE).
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Change the common "init with 0" + "give" idiom to "init with 1". This
won't change the behavior or performance, but should decrease the size
ever so slightly.
This change has been performed mechanically with the following
Coccinelle script:
@@
expression SEM;
expression LIMIT;
expression TIMEOUT;
@@
- k_sem_init(SEM, 0, LIMIT);
- k_sem_give(SEM);
+ k_sem_init(SEM, 1, LIMIT);
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As I2C_0 (port 0) isn't used on the STM32 platforms we didn't exclude
the related Kconfig options if DTS was enabled. However other SoCs
(like NXP) do use I2C_0 so we need to fixup the Kconfig dependencies
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The I2C Slave Read support isn't well defined and not actually supported
by any i2c driver at this point. We can add this back when slave mode
is more thought out.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When building tests/kernel/test_build/test_debug on disco_l475_iot1 we
get the following build error:
drivers/i2c/i2c_ll_stm32_v2.c: In function ‘stm32_i2c_configure_timing’:
ext/hal/st/stm32cube/stm32l4xx/soc/stm32l4xx.h:207:38: error: ‘timing’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
^
drivers/i2c/i2c_ll_stm32_v2.c:265:8: note: ‘timing’ was declared here
u32_t timing;
^~~~~~
Fix by initializing timing to 0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.
Jira: ZEP-2067
Signed-off-by: Justin Watson <jwatson5@gmail.com>
SBCon is a simple device which allows directly setting and getting the
hardware state of two-bit serial interfaces like I2C. Therefore to be
useable we need to drive the lines with the appropriate protocol under
software control.
Change-Id: If9000bb75f7b0ad7bbb256b1cb38cc70fa6ca8ea
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Several minor changes to clean up I2C Kconfig file
- align help text
- remove duplicate dependencies
- use unified naming for I2C port options
- replace outdated references to datasheet in help text
- add comments at the end of 'endif'
Change-Id: I452083feb29f40909e6e38324ff9d9961fc6bd07
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This driver implements an I2C interface by driving two GPIO lines under
software control.
Change-Id: Ie49cc67aed6acb30086ee851041fe2470da241cf
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This library implements the I2C single master protocol in software.
It supports the Standard-mode and Fast-mode speeds and doesn't support
optional protocol feature like 10-bit addresses or clock stretching.
Change-Id: I375d572a83714522421f2967dc414b3bec169e95
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies. We also convert the PRI printf formatters in the arch
code over to normal formatters.
Jira: ZEP-2051
Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t. This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.
We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.
We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.
Jira: ZEP-2051
Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added I2C bus (TWIHS) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Jira: ZEP-1866
Change-Id: Ic5aa7b6b21295feccae883d580b38bbeaf2ce291
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Wrong base address has been provided to I2C_2 instance.
Fix this issue for proper behavior
Change-Id: I81e5cb71a5136e742f460db5db39b2adf2f10f2d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
I2C_SHARED_IRQ, I2C_0_IRQ_SHARED, I2C_0_IRQ_DIRECT Kconfig options
are DW driver specific. Its presence is confusing for a user of any
other I2C driver than DW. This patch renames these options to include
DW string and makes it visible only for DW I2C driver. This is a
similar implementation to that used by ETH DW Ethernet driver.
Change-Id: I795506f9b103c028a22317df9ad632dce5cd1343
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
To follow Zephyr convention this patch is placing all I2C driver
Kconfig options in submenu.
Change-Id: Ibc485305b7effb65ed7f24b933fe35d0fa0afee8
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
I2C_CLOCK_SPEED Kconfig option is DW driver specific. It does not
define I2C interface speed but rather the I2C DW module clock speed.
It is confusing for a user of any other I2C driver than DW.
This patch renames this option to I2C_DW_CLOCK_SPEED and makes it
visible only for DW I2C driver.
Change-Id: I97f57332fd5cca644eabdef0968a0b2174b885ff
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* SPIMx support for nrf52 spi interface with easy dma
Change-Id: I3221b14867924b91a9d809faf689090574f5dc1c
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
Add support for I2C_2 instance on stm32lx driver
Change-Id: Iaa17305dd21f92954274ca522d30d464e0a53b7b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion
Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series
Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introducing STM32Cube based clock control driver for
stm32 family, update stm32 i2c_lx driver to support it.
Clean up will be done in a following commit.
Change-Id: Ie5059bf4122d65fab1a663a5b00e0d761850a49d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use of SECONDARY in DEVICE_AND_API_INIT is now deprecated and should
be replaced by POST_KERNEL
Change-Id: I543ae70e493527e75b4a4bcb9191475065b49166
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.
Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
Update the builtin QMSI code to 1.4 (RC2).
The below shim drivers were updated for API or interface changes:
- aio
- counter
- i2c_ss
- rtc
- wdt.
Also, arch soc specific power management code were updated.
Jira: ZEP-1572
Change-Id: Ibc8fae032a39ffb2c2c997f697835bc0208fd308
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
The DW i2c driver chooses to return -EPERM following a PCI error in
driver configuration. This seems an odd choice. All of the other I2C
drivers return -EIO for general failures detected during driver
configuration.
Switch the DW driver from EPERM to EIO.
Change-Id: Ia4f96386620319736ae4c09212b0a05ea38169b1
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The I2C drivers handle an empty list of I2C messages inconsistenty.
There are two different behaviours, one set of drivers dectects a
requests to transfer zero messages and return -EINVAL while the other
group simple transfer no data and return success.
Adopt the latter behaviour consistently across all drivers. Update
the i2c.h API documentation to reflect this behaviour.
Change-Id: I427fc1b0e18ddc04b7b59c294e0240b3d6ca4073
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
