PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Remove the Zephyr implementation and
update the uart_qmsi driver to use new QMSI PM APIs.
Jira: ZEP-998
Change-Id: I418e6384c16e374e9062820e12648a2d524a312d
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
Use the macros provided by QMSI (or by ourselves, when QMSI doesn't
have them yet) to register interrupts independently of which core it's
building for.
Change-Id: I83fd7e42598b45aef8132316906a3bff291dfe92
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_USB_BASE is renamed to QM_USB_0_BASE;
- parameter int_en from qm_uart cfg struct was removed;
- driver's folder now has a new structure, fix makefiles accordingly;
- QM_WDT_MODE and related renamed to QM_WDT_CR_RMOD;
- QM_SCSS_AON renamed to QM_AONC.
Change-Id: Iffe9c66b7a3f2fe64418326e20ff0894149b3044
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I0257e242a2d3bc4e353a3477364a4d9a7fb72b82
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Updated CONFIG_SOC_QUARK_SE_SS to CONFIG_SOC_QUARK_SE_C1000_SS
Change-Id: I7dc02d91a4d739f6cd3f84001d1dd29759317163
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
The Sensor Subsystem has different IRQ numbers for the same device
across CPUs. QMSI declares these, but doesn't do anything to try to
map it automatically, so we have to do it in the driver.
Similarly the SCSS interrupt routing (the SoC-wide "APIC", which is
distinct from the per-CPU interrupt masking hardware) needs to know
which CPU we're trying to unmask an interrupt for.
Change-Id: I27e5ec44f324f869e16a92e7ef40a22a305d98a2
Jira: ZEP-546
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
One remaining reference to uart_qmsi_pm_save_config
was missed by patch bc60506d3e.
This reference is removed.
This fixes the following error:
...
drivers/built-in.o: In function `uart_qmsi_line_ctrl_set':
/drivers/serial/uart_qmsi.c:439:
undefined reference to `uart_qmsi_pm_save_config'
collect2: error: ld returned 1 exit status
...
Change-Id: I1ceda0e152db5a1c7f70d67c04b931416687031a
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
In order to restore uart context after entering
SYS_PM_DEEP_SLEEP, suspend and resume functions
are called.
The following parameters are restored:
- All registers for the UART device.
- UART clocks.
The FIFO control register cannot be read back and is
not stored in the device configuration.
The default parameters are applied for them.
The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.
Change-Id: I4be9246f6aa5a6e0d91df54c1c69574060136607
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
CONFIG_UART_INTERRUPT_DRIVE should be CONFIG_UART_INTERRUPT_DRIVEN
CONFIG_UART_LINE_CTR should be CONFIG_UART_LINE_CTRL
Change-Id: I11fba5b387e3d36711cd3c813fc8a297ae23af05
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The macro defining the device_pm_ops structs is located inside an
ifdef for CONFIG_UART_QMSI_0, so when the UART_0 is disabled at build
time, but UART_1 is still used, it references a struct not defined.
Fix it by placing the DEFINE_DEVICE_PM_OPS line outside the ifdef block.
Change-Id: I7dafda162741201ee47b5b480c07ec8c1f373d64
Signed-off-by: Iván Briano <ivan.briano@intel.com>
This adds some basic suspend/resume support in the uart_qmsi
driver. This is part of a change to enable device suspend/resume
and deep sleep support in sample PM application.
Jira: ZEP-512
Change-Id: I38cfbfb352d0027b7beaadebedbc10002dade50a
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Use IOAPIC_EDGE instead of IOAPIC_LEVEL to fix missing interrupts.
During tests it was found that using IOAPIC_LEVEL interrupts for UART at
some points are lost.
Proposed by Calando, Antoine <antoine.calando@intel.com>
Change-Id: I18b20217c4d73fdeaa424bf59d00f6be1ec6ef1b
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Revert patch fixing Bluetooth application with Debug enabled crashing.
This reverts commit 029d3beb57.
Change-Id: I0004dae656ca5a0b44da9f12542088d47c38b837
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
QMSI uart driver has removed qm_uart_get_config API. Updated
the shim driver to use alternatives.
Change-Id: I3ccfd0dfec3711d250de7d1004275d9b02d7477a
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Global data and device setting can be messed up by concurrent
API calls. This change is to serialize the access.
Jira: ZEP-454
Change-Id: I520722aecab7db443d053fd45498a22e165889de
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
On current Curie-based boards UART 0 is wired to the nRF51 BLE
controller and requires HW flow control to be enabled in order to
function. This patch restores the same behavior that was present
before the "qmsi: uart: use built-in qmsi driver" patch.
Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This patch fixes the QMSI UART shim driver so we are able to use it in
Quark D2000 based platforms. Differently from Quark SE, the peripheral
clock gate bit (CLK_PERIPH_CLK) is not enabled by default in Quark
D2000. We have to explicitly set this bit in order to properly initialize
the device.
Since this drivers is now properly working on Quark D2000, this patch
also sets the QMSI driver default options in arch/x86/soc/quark_d2000/
Kconfig.
Change-Id: I817b7703554be162ac628dcd8d3d07512b9eb3f5
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_NO_SUPPORT by
-ENODEV at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I03007527367b03e6fd72a85004b7d3b81046a6a6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch extends the UART QMSI driver so it supports the IRQ APIs from
include/uart.h. The IRQ APIs are enabled by the 'CONFIG_UART_INTERRUPT_
DRIVEN' option.
Differently from others APIs such as I2C and SPI, the UART API is very
low level. For that reason, the IRQ facilities (e.g. irq based transfers)
from the QMSI driver are not useful to the shim driver at the moment. In
order to implement the IRQ APIs we rely on UART registers defined by QMSI.
QMSI UART header is missing some macro definitions from IRR register so
we define them in the shim driver.
Since the IRQ trigger condition is not configurable in the QMSI shim
driver, this patch also changes drivers/serial/Kconfig so the "UART
IRQ Trigger Condition" choice doesn't appear on the menu if the QMSI
driver is selected.
Change-Id: Idf9a0f6a47af2a550a31f474d721068dca989713
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch extends the UART QMSI driver so it supports line control and
driver command APIs.
The line control function supports the baud rate option only (LINE_CTRL_
BAUD_RATE) and, at the moment, the QMSI driver doesn't have any custom
command.
Change-Id: Icc10cb39b4077ed4ccfefb1f0feecec75b79d67c
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch extends the UART QMSI driver so it supports different baud
rate configurations. The baud rate is set per UART controller via
menuconfig. The default baud rate is 115200.
Change-Id: Iad736d72bd309b8a33ab5d538251fce374e89fd2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch introduces the QMSI UART driver which is simply a shim driver
based on UART driver provided by QMSI BSP.
This initial version implements only the mandatory APIs 'poll_in',
'poll_out' and 'err_check' which are required by trivial sample apps and
by output functionality from the console driver. The remaining APIs will
be implemented by up coming patches. The driver supports only 115200 baud
rate at the moment.
In order to enable this driver, the following options should be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory"
CONFIG_SERIAL=y
CONFIG_UART_QMSI=y
This driver has been tested with Quark SE Devboard so this patch also
adds its platform-specific default configuration options to 'arch/x86/
soc/quark_se/Kconfig'.
Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
