Update nsim board documentation:
* add info about run on HW (HAPS)
* update info about dependencies in case of single / multi core
runs in simulation and run on HW
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
ARC nSIM boards (starting with nsim_ prefix) allow to run
Zephyr in simulator and on real hardware.
Allow to run Zephyr on HW by enabling mdb-hw runner.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
mdb runner is quite special as it can be used to run Zephyr on
both simulator (nSIM) and real hardware.
However it is really misleading as same command (west flash)
will run Zephyr in simulation for one board and try to run it
on HW for another board. Things are getting worse for boards
supporting both runs in simulation and on real hardware.
Let's split mdb runner for mdb-hw (for runs on HW) and mdb-nsim
(for runs in simulation) runners.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
align kconfig option CONFIG_ARC_CUSTOM_INIT to
CONFIG_INIT_ARCH_HW_AT_BOOT. Remove unused CONFIG_ARC_CUSTOM_INIT in
kconfig.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
UART IP is clocked with 50MHz on HAPS by default. So switch
UART clock-frequency from 100MHz to 50MHz for nsim_* boards
so the binaries can be run on HAPS as well.
This property is dummy in case run in simulator (nSIM) so we
don't need to change anything in nSIM configuration files.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
In PR #26836, we switch nSIM from custom legacy ARC UART model
to ns16550 model, which will allow us to use zephyr images build for
nSIM on other platforms like HAPS, QEMU, etc...
In PR #27334, which introduce new board nsim_em7d_v22, has gone
parallel to the switch to dwuart, and is still using legacy model.
With wrong configuration, the uart for nsim_em7d_v22 has no output,
which cause all tests failure.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
EMSK boards can't be reset between tests due to hardware configures.
MPU v3 configs in previous test could cause exceptions in the following
tests. This commit fixes this issue by restoring MPU registers initial
states at early init stage.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
Enable MWDT toolchain in sanitycheck for all ARC nSIM boards
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
add 2 cores configuration for
* who want to use 2 cores
* sanitycheck tests, as we found there are
difference between 2 cores and 4 cores, see
report in issue #26794
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
let mdd runner connect connect cores according to CONFIG_MP_NUM_CPUS,
e.g.
* CONFIG_MP_NUM_CPUS = 2, just connect 2 cores
* CONFIG_MP_NUM_CPUS = 1, just connect 1 core
* CONFIG_MP_NUM_CPUS = 4, connect all 4 cores
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Typically we have ARC core configurations where Fast IRQs (FIRQ) are
enabled together with multiple register files and those we have covered
by testing. But FIRQ & single register bank we only happen to have on
the older EMSK v2.2.it might be a good idea to add a similar
configuration to nSIM "boards" so that we keep it tested regularly.
nsim_em7d_v22 configuration is similar with em_staterkit_em7d_v22,
both configed with FIRQ & single register bank.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
* add toolchain abstraction for coverage
* add select HAS_COVERAGE_SUPPORT to kconfig
* port gcov linker code to CKake for arc
Signed-off-by: Jingru Wang <jingru@synopsys.com>
* to avoid confusion, combine nsim and mdb related
cmake configurations.
* this also enable the lanuch of mdb in sanitycheck
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
For true mmio-sram, arc,iccm, arc,dccm nodes we should not be setting
device_type = "memory". This should be used for true DRAM regions of
memory and not on SoC SRAMs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch nSIM from custom ARC UART to ns16550 model. That will
allow us to use zephyr images built for nSIM on other platforms
like HAPS, QEMU, etc...
This patch do:
* switch nSIM board to ns16550 UART usage
* change nSIM simulator configuration to use ns16550 UART model
* drop checks for CONFIG_UART_NSIM in ARC code
* update nSIM documentation
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
The generic SPI GPIO chip select support now respects devicetree flags
for signal active level. Update all cs-gpios properties to specify
active low.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With latest SDK release v0.11.3 basic SMP support for HSDK
board was introduced in OpenOCD. Lets enable smp in openocd.cfg,
so using west we would be able to run Zephyr on all 4 cores.
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
* current supported boards:
* emsk, iotdk, nsim, emsdp, hsdk.
* for the unsupported future boards, pls take a
reference of supported boards' board.cmake.
* mdb runner is required and the default runner for SMP
case, e.g., HSDK and nsim_hs_smp.
* other ARC boards can also choose to use mdb by
setting runner as mdb, e.g. west flash --runner mdb.
* with mdb runner, user can make a debug through mdb gui
* with arc_nsim or opencod runner (default runner), user
can make a debug through gdb cmdline.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
emsdp_em7d_esp is a board with secure just like em_starterkit_em7d,
but the secure feature not configed in defconfig file. we need to add
below configs in emsdp_em7d_esp_defconfig files:
CONFIG_ARC_HAS_SECURE=y
CONFIG_TRUSTED_EXECUTION_SECURE=y
when secure feature enabled, we use secure timer for system tick, so
we need to add below macro for secure timer:
#define IRQ_SEC_TIMER0 20
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Now when we're finally ready to open QEMU port for ARC
we introduce the first ever platform it supports and in fact does
that quite well - Zephyr RTOS.
For now we only offer support of basic EM & HS code execution,
built-in timers, interrupt controller and set of very simple
peripherals: DW UART & optionally MMIO Virtio devices.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
As a slow FPGA platform with max. freq < 25 Mhz,
the default CON_SYS_CLOCK_TICKS_PER_SEC=10000 is
not suitable. CON_SYS_CLOCK_TICKS_PER_SEC=100 is
a better value.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
ARC_MPU_VER 2 has a strong requirement in
* size, must be >= 2048 bytes and power of 2
* start address must be aligned to size
It may bring a big waste of memory.
On the other hand, GEN_PRIV_STACK is used for ARC_MPU_VER 2,
it conflicts with MPU_STACK_GUARD.
So considering the limmitations, remove MPU_STACK_GUARD for
ARC_MPU_VER 2
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The Kconfig I2C_[0-9] sybmols don't have any meaning for the majority of
SoCs. The drivers doesn't utilize them and no sample or test code does
either so we can remove setting them in board Kconfig.defconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert linker scripts and arc_mpu_regions.c setup to use new
devicetree.h macros to extract the base address and size of the various
memory regions (DDR, SRAM, FLASH, DCCM, ICCM). We also remove the
scaling up and down since DT_REG_SIZE() returns the value in bytes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Given that nsim_em can run the tests instead of just building them as
with em_starterkit_em7d, make it a default platform instead of
em_starterkit_em7d to get most of the testing when nsim simulator is
installed on the developer machine.
Tests run are 1000x more useful than just building them, even if we do
not have a large installed base of nsim.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now the ARC SecureShield related features are experimental. The ARC
normal application cannot run alone, need the secure service example to
initialize the context and boot.
Here move ARC normal related configurations out of board dir to
avoid the impact of CI test and the confusion to users.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Should not be set to a default platform, this is unnecessarily causing
builds of all tests on this platform for all PRs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
The ILITEK ILI9340 should have been in the dts and added as #defines in
dts_fixup.h. Fix this by adding a display node in the dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now when ARC development boards are switched to generic OpenOCD
runner we need to explicitly instruct the runner to load Elf but not
binary image (which is a default for OpenOCD runner).
This might be done either manually adding "--use-elf" option to
west's command line or that might be added by default fro affected
boards, which we do exactly now.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/22888.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
For the non-secure image, the architecture still supports secure
execution, so express that in the defconfig.
See #22474.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Some ARC deveopment boards have q bit funny memory maps.
For example IoT Development Kit board has those areas
that we use in Zephyr:
1. 256 KiB of ICCM @ 0x2000_0000 for code
(i.e. ".text" section goes here)
2. 128 KiB of DCCM @ 0x8000_0000 for data
(i.e. ".data" section goes here)
And so objcopy dumps 0x6000_0000 bytes (which is ~ 1.5Gib or raw data)
in zephyr.hex which gives us ~ 4.3 GiB of resulting zephyr.hex size.
W/o gap filling we're back at normal tens of KiB.
Given we have currently no need to fill the gaps anyways we disable it
for all ARC devboards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The last core which gets initilaized is used by default by OpenOCD.
Thus if we leave configuration as it was we'll get single-core
binaries executed by core3 while we expect core0 to be used.
We didn't see that problem reviously because we used to use
GDB for binary (actually Elf) loading and execution and there in GDB
we explicitly connected to the OpenOCD port wired to core 0.
Now with "west flash" we use OpenOCD for loading anr running and
we need everything setup correctly from the beginning.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
We used to use "em-starterkit" runner for ARC which is
basically heavy-modified "openocd" runner tweaked to
use GDB for loading and starting Elf files.
Now when loading and running Elf files is possible with generic
"openocd" runner we may us it. So we switch and get rid of
"em-starterkit" as well since we no longer need it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
To be used in setups with multiple boards attached to the same one
host we need to have an ability to specify precisely which JTAG probe
to use for a particular board.
This is done by passing "ftdi_serial XXX" command to OpenOCD.
And the serial ("XXX") is supposed to be passed from higher level,
typically via west's options.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
