Adding a dependency on the GPIO resource in the TI Power module, and
configuring the edge detection on pads as a wakeup source.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This reverts commit 8739517107.
Pull Request #23437 was merged by mistake with an invalid manifest.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future). We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When added SAM4E and SAMV71 platform the huge amount of refactor left
out this two configurations. This add missing configuration for all
supported devices.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Disabling gpio interrupts on the pin prior to changing its interrupt
type to level-based helps prevent spurious interrupts that would be
otherwise observed, if gpio interrupts were originally enabled when
gpio_cc32xx_pin_interrupt_configure() is invoked.
Fixes#22847
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
In the gpio isr, gpio interrupts are disabled when invoking the
registered callbacks. This is unnecessary, and causes a problem if the
callback attempts to disable gpio interrupts by reconfiguring the pin
as in the test gpio_basic_api.
Fixes#22847
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Include gpio_utils.h to fix a build failure:
gpio_pca95xx.c:490:20: warning: implicit declaration of
function 'GPIO_PORT_PIN_MASK_FROM_NGPIOS'
[-Wimplicit-function-declaration]
gpio_pca95xx.c:490:20: error: initializer element is not constant
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(
DT_INST_##inst##_NXP_PCA95XX_NGPIOS), \
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
The data_first flag was intended to be set when the configuration
requires setting the output value before setting the direction.
Respect the intent.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.
Will do the defconfigs separately in case there are any complaints
there.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Use gpio_pin_t uniformly when passing pin indexes to the driver. Use
gpio_flags_t uniformly when passing flags to the driver. Change name
of pin configuration function in API function table to be consistent
with other API functions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
There is a typedef used to store pin indexes in configuration
structures. For consistency it should also be used to identify pin
indexes in function prototypes.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The only remaining port operations have dedicated API function table
entries. Remove the defines for access op (mode), and remove support
for access op from all implementations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The last external reference to these was removed when the pin
write/read functions were deprecated. Remove the syscall support, API
function table entries, and implementation from all drivers.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
These have been replaced by the appropriate call to
gpio_pin_interrupt_configure(). While the disable function could be
implemented using the new functionality, the enable function cannot
because the interrupt mode is not available. Consequently we cannot
replace these with equivalent functionality using the legacy API.
Clean up the internal implementation by removing the inaccessible
port-based enable/disable feature, leaving the pin-based capability in
place.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This API will be deprecated in favor of the new API that clearly
specifies whether it works on logical or physical levels.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC series; until aliases for the new properties are
added the code assumes all pins are supported.
Since pin ordinal validation is now done directly in gpio API,
remove checks inside the driver itself.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the hard-coded device-specific pin count to
initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it. Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. The devicetree binding does not inherit from
gpio-controller, so the required property is not available there. A
hard-coded value of 32 pins has been implemented to make the driver
function.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC; until aliases for the new properties are added the
code assumes all pins are supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace the common data structure with the common config structure as
a prefix of the driver-specific config structure and use the
devicetree GPIO pin counts to initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Extend the driver data structure with a field that identifies the pins
supported by the device. Document the fields and who is responsible
for maintaining them.
Update all configuration functions for specific pins to return an
error if the pin is not supported.
Update all set/get functions for specific pins to assert if the pin is
not supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update driver code to use new GPIO configuration flags such as
GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The public API for GPIO flags should use unsigned values, and for
MISRA compliance the size should not be platform-dependent. Add a
typedef for generic flags.
Also add typedefs for pin indexes and devicetree flags so these can
be safely recorded from devicetree property values without risking
loss of information if more flags are added in the future.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commits adds GPIO driver for LiteX SoC builder.
Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
IO extenders may provide input signals to LEDs or sensors where
leaving the signal undriven may result in increased power consumption
or misbehavior. The SX1509B powers up with all signals configured as
inputs. Provide a way to indicate which pins should be set as output,
and their initial signal level, when the device is configured.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The cached state of the output must be managed under mutex, but the
original toggle implementation read the current state outside the
mutex and used it to update the state. Rework the internal API so
that toggle is done within the mutex, distinct from masked set.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This factors the common bits of device declaration into macros
so it would be easier to add new instances.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove support for GPIO_ACCESS_BY_PORT in the config function
as configuration by port is going away.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Since the GPIO expander is a I2C device, any read/write to
the registers has high latency. Therefore, semaphore is
introduced to prevent multiple threads to manipulate
the GPIOs at the same time.
Also make sure that we are not doing I2C transactions
within ISRs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Only update the internal register cache after successful write,
or else it would get out of sync with hardware.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The register pair for each port in the GPIO expander are
port 0 first then port 1. This would not work for big
endian systems with the u16_t port value. So need to
swap the byte ordering on such system.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The structures defined in the header file are only used by
the driver source file, and should not be used by others.
So roll the header file into the source file so it won't
get #include.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use I2C burst write to write 2 bytes to each pair of registers
instead of 2 separate transactions of writing 1 byte.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
PCA95XX is a series of compatible I2C-based GPIO expanders,
with common registers on input/output, polarity and configuration.
This renames the original PCAL9535A driver to PCA95XX to indicate
that it can support this series. Additional features on variants
are guarded by kconfigs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The interrupt functionality of this driver is incomplete,
but for the sake of not slowing down the GPIO API refactor,
I'm just returning -ENOTSUP until we can track down the issue.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
The 1pin test fails to pass because it expects to be able to
manipulate more than 16 pins. Since the intent is to filter invalid
pins at the wrapper level remove the validation performed within the
driver.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Some drivers masked the set of signaled pins based on enabled
interrupts, some did not. For those that did not the 2-pin test could
fail. The documentation does not imply that pins unrelated to the
callback participate in the notification process, so do the filtering
in the generic callback loop.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In order to reliably detect interrupts the interrupt must be
acknowledged before the callback is invoked.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In the fine print of the manual it's stated that attempts to enable a
pull in one direction while the pull in the other direction is enabled
are ignored. This has been confirmed. Change logic to disable both
pulls, then enable the one that's configured, if any.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In order to reliably detect interrupts the interrupt must be
acknowledged before the callback is invoked.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
- Updates gpio driver and device tree files to the new GPIO Config flags
- Implements the new port_* APIs
- Update I2C and PWM Drivers to use new GPIO config
- Add esp32.overlay to gpio_basic_api test
- refactor convert_int_type, regs struct
- remove config_polarity
- add kConfig notes
Tests:
- samples/basic/blinky
- samples/basic/button
- tests/drivers/gpio/gpio_basic_api
- tests/drivers/gpio/gpio_api_1pin
Board:
- esp32 DevKitC V4
Note about interrupts:
The ESP32 requires specifying a CPU interrupt to be used for GPIO
interrupt signals. CPU interrupts can be either level or edge (or
special) triggered, but not both.
Please check gpio/Kconfig.esp32 for more info.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
As the mmio32 is more of a library than a proper driver, just implement
the new port functions and have pin_interrupt_configure marked pretty
much as not supported.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updates the rv32m1 gpio driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle and pin_interrupt_configure functions recently
added to the gpio api.
Assumes the gpio api layer handles translating logical flags to physical
flags.
Stops quietly reconfiguring pinmuxes to gpio mode. The pinmux must now
be configured explicitly in the board's pinmux.c or in the application.
Tested with:
- samples/basic/blinky
- samples/basic/button
- tests/drivers/gpio/gpio_api_1pin
On boards:
- rv32m1_vega_ri5cy
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove redundant interrupt code from gpio_mcux_configure, move the rest
to gpio_mcux_pin_interrupt_configure.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
We treat GPIO_INT_MODE_LEVEL as not supported as the hardware doesn't
seem to handle level interrupts as one would expect. Looking into this
further to determine if its a HW bug or some misconfiguration in the
software.
We don't support dynamic setting of PULL_UP/PULL_DOWN config as this is
handled by pinctrl for the current boards we support the CMSDK AHB
driver on.
Tested on musca-a board.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
LPC GPIO architecture uses multiple devices.
GPIO input is routed via INPUTMUX to the PINT
device which roots the interrupt to NVIC.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Updates the mcux lpc driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle functions recently added to the gpio api.
ISR functions to be added later.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
stm32_exti_enable was returning errors on line > 32 or line pointing
to non implemented line. Both conditions are hard-coded, hence there
is no use to detect them dynamically in the code.
Check them with assert. As a consequence, function could now be void.
Additionally, enable exti irq line only if both checks are passed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Since it is now possible to disable/re-enable interrupts and
also to reconfigure an already configured interrupt, it is
now required to clear non requested triggers.
While it is not strictly requested, triggers are also cleared
when interrupt is disabled (assuming trigger should be configured
when interrupt is enabled).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
fixup exti
Perform few clean up in stm32 gpio driver:
*Clean up uint32_t occurrences left over.
*Move function gpio_stm32_flags_to_conf from const to static
and remove useless parameter check
*Rework error handling in functoin gpio_stm32_config
*Remove gpio_stm32_int_enabled_port function and have direct call
to gpio_stm32_get_exti_source
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Updates the imx gpio driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle and pin_interrupt_configure functions recently
added to the gpio api.
Assumes the gpio api layer handles translating logical flags to physical
flags.
Tested with:
- samples/basic/blinky
- samples/basic/button
- tests/drivers/gpio/gpio_api_1pin
- tests/drivers/gpio/gpio_basic_api
On boards:
- udoo_neo_full_m4
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Updates the mcux igpio driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle and pin_interrupt_configure functions recently
added to the gpio api.
Assumes the gpio api layer handles translating logical flags to physical
flags.
Removes port configuration support since that feature is deprecated in
the new gpio api.
Tested with:
- samples/basic/blinky
- samples/basic/button
- tests/drivers/gpio/gpio_api_1pin
On boards:
- mimxrt1015_evk
- mimxrt1020_evk
- mimxrt1050_evk
- mimxrt1060_evk
- mimxrt1064_evk
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Implement the new GPIO driver APIs for the HT16K33 and update the
driver to use the new GPIO flags.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
On the TI CC32xx, the GPIO peripheral supports only 8 pins per port.
We should add assertions where appropriate to verify this.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Updates the cc13x2/cc26x2 gpio driver and all associated boards to use
new device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle and pin_interrupt_configure functions recently
added to the gpio api.
Tested with:
samples/basic/blinky
samples/basic/button
tests/drivers/gpio/gpio_api_1pin
tests/drivers/gpio/gpio_basic_api
On board:
cc1352r1_launchxl
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Updates the cc32xx gpio driver and all associated boards to use new
device tree compatible gpio configuration flags. Implements new port
get/set/clear/toggle and pin_interrupt_configure functions recently
added to the gpio api.
Tested with:
samples/basic/blinky
samples/basic/button
tests/drivers/gpio/gpio_api_1pin
tests/drivers/gpio/gpio_basic_api
On boards:
cc3220sf_launchxl
cc3235sf_launchxl
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API.
Tested on external SX1509B breakout board and Thingy:52.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
The interrupt triggering on both edges is a remnant from the old
Quark SE which has a customized DesignWare GPIO block. So remove
the support for both edges as the board is no longer supported.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The MCUX GPIO peripheral must be configured as either input or output.
Reject attempts to configure disconnected or bidirectional.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change when we clear interrupt status to happen before we handle the
callbacks. As the callbacks might manipluate the GPIO state and cause
a GPIO interrupt. If we clear interrupt status after than we might
miss an interrupt.
Also only clear interrupts for interrupts that are we have enabled and
that were reported when we read from the interrupt status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on frdm_k64f board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on nrf52840_pca10056 board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on sam_e70_xplained board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on efr32_slwstk6061a board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Both pin sets and values encoding pin values are ultimately represented
by 32-bit unsigned integers. Provide typedefs that make the role of a
parameter explicit.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit moves interrupt configuration for a single pin from
gpio_pin_configure to gpio_pin_interrupt_configure function.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit adds following functions which work with pin logical levels
(take into account GPIO_ACTIVE_LOW flag):
- gpio_port_get, gpio_port_set_masked, gpio_port_set_bits,
gpio_port_clear_bits, gpio_port_set_clr_bits
- gpio_pin_get, gpio_pin_set
Functions which work with pin physical levels:
- gpio_port_get_raw, gpio_port_set_masked_raw, gpio_port_set_bits_raw,
gpio_port_clear_bits_raw, gpio_port_set_clr_bits_raw
- gpio_pin_get_raw, gpio_pin_set_raw
As well as functions:
- gpio_port_toggle_bits, gpio_pin_toggle_bits
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such. If anyone
is interesting in supporting this platform we can easily recovery it
from git.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).
The functionality is split into two drivers; an ADC driver and a GPIO
driver.
Tested with LMP90080 and LMP90100.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
sam0 and stm32 specific interrupt controller headers are meant to be
public, and as such should be found in
include/drivers/interrupt_controller and not in
drivers/interrupt_controllers.
Fixing documentation issues as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Enable SWO debug output during system initialization and not as part of
GPIO driver initialization. After the modification the logger output
becomes available earlier during the boot process. Also, it's not
necessary anymore to build full GPIO driver only to enable SWO. This may
be critical when building small images.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Up to now interrupts could be only configured once, with no way to
disable them in runtime.
Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.
The improvement over previously reverted patch [1] is that we disable
interrupts only when we configure port for which interrupt line was
previously selected. This for example prevents to disable interrupts
line 2 in case PA2 was previously configured as interrupt source, but we
are currently configuring PB2 as output.
[1] 0951ce2d34 ("gpio: stm32: support disabling and reenabling
interrupts on pin")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This patch doesn't change functionality, but is only related to improved
readability and reusability.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With dual core handling introduction, we now need to take care to
always release lock before exiting function.
Rework gpio_stm32_config to take this into account.
Additionally, since ENOSYS usage is resevred to system calls
handling, replace with EIO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The translation to encoded multi-level interrupts failed to account
for the GPIO interrupt number being encoded in at bit position 8,
and being offset by 1 in the base encoding.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Update calls to nrfx HAL functions to reflect API changes introduced in
nrfx 2.0.0. All these functions are now called with the first parameter
pointing to the structure of registers of the relevant peripheral.
Also a few functions got renamed:
- nrf_gpiote_int_is_enabled to nrf_gpiote_int_enable_check
- nrf_gpiote_event_is_set to nrf_gpiote_event_check
- nrf_rng_event_get to nrf_rng_event_check
- nrf_rng_int_get to nrf_rng_int_enable_check
- nrf_rtc_event_pending to nrf_rtc_event_check
- nrf_rtc_int_is_enabled to nrf_rtc_int_enable_check
- nrf_timer_cc_read to nrf_timer_cc_get
- nrf_timer_cc_write to nrf_timer_cc_set
Default configuration values were removed from nrfx_config files,
so the drivers pwm_nrfx and spi_nrfx_spis no longer can use those.
Function nrfx_pwm_init() now takes one more parameter - context pointer
that is passed to the event handler, not used in the pwm_nrfx driver.
HALs for UART and UARTE now allow configuration of the parity type
and the number of stop bits, for SoCs that provide the corresponding
registers.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
