Commit Graph

2908 Commits

Author SHA1 Message Date
Punit Vara
c995c4b42b dts: arc: Use dts tree for designware driver
Get required data from dts tree.

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-08-29 13:46:57 -04:00
Punit Vara
ef83943387 drivers: Use Designware driver for sensor subsystem
Remove adc_qmsi_ss to use designware driver for sensor subsystem

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-08-29 13:46:57 -04:00
Justin Watson
4e551aabb6 sam: adc: Updated SAM ADC driver.
Updated to work with new ADC API.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-08-29 13:46:57 -04:00
Andrzej Głąbek
0a97b5bf35 dts: nrf: Add ADC nodes and bindings for nRF SoCs
This commit adds ADC nodes to DTS files for nRF SoCs and introduces
corresponding  bindings for these nodes.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-08-29 13:46:57 -04:00
Yannis Damigos
d2e713f9ef arch: stm32l4: Enable gpio interrupts correctly
Enable gpio interrupts correctly and don't
disable the already enabled interrupts.

Fixes #9630

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 08:53:09 -04:00
Yannis Damigos
32a6fa1c58 arch: st_stm32: Remove I2C and SPI instances from common defconfig
Remove I2C and SPI instances when enabling I2C_STM32 and
SPI_STM32 drivers.

It allows to enable the drivers if ports I2C_4, SPI_4,
SPI_5, SPI_6 are selected.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 07:04:32 -05:00
Kiril Zyapkov
64b130683c arch: arm: stm32l4: add missing I2C_3 to dts.fixup
One can enable I2C_3 in kconfig and set status = "ok" in dts, but
the driver expects to find the config as fixed up with this
addition.

Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
2018-08-28 13:18:44 -05:00
David B. Kinder
1c29bff055 doc: fix kconfig misspellings
Fix misspellings in kconfig files missed during regular reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-08-28 13:58:46 -04:00
Adithya Baglody
511edf0175 Revert "sam_e70: enable instruction and data caches on sam_e70"
This reverts commit c0907762f3.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-28 13:46:47 -04:00
Anas Nashif
c0907762f3 sam_e70: enable instruction and data caches on sam_e70
The Cortex-M7 CPU included in the SAM e70 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization.

Fixes #8138

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-27 10:09:19 -04:00
Sebastian Bøe
69d8c1c08c syscalls: Correct the type of _k_syscall_table
_k_syscall_table is an array of function pointers and is declared as
such in C sources, this makes it an STT_OBJECT[0] in the symbol
table. But when the same symbol is declared in assembly, it is
declared to be a function, which would make the symbol an STT_FUNC.

When linking with LTO this type inconsistency results in the warning:

real-ld: Warning: type of symbol `_k_syscall_table' changed from 2 to
1 in /tmp/cc84ofK0.ltrans8.ltrans.o

To fix this warning we declare the table with GDATA instead of GTEXT,
which will change the type from 'function' to 'object'.

[0]
https://docs.oracle.com/cd/E19455-01/816-0559/chapter6-79797/index.html

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-26 08:54:27 -07:00
Aurelien Jarno
069d409b29 arch: arm: stm32: enable instruction and data caches on STM32F7
The Cortex-M7 CPU included in the STM32F7 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization. Note that the D-cache should only be enabled if it
is disabled, to workaround CMSIS issue #331.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-08-25 07:15:33 -07:00
Wayne Ren
0be1875e42 boards: cleanup and update the default config of arc boards
apply to snps arc boards

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-24 09:31:24 -07:00
Piotr Mienkowski
f69199777f soc: efr32fg1p: correct clock initialization sequence
This patch changes clock initialization sequence to initialize external
cristal oscillators only if it was not done before. Initialization of
external cristal oscillators may be performed by the bootloader.

Tested on BRD4250B evaluation board.

Fixes #9471

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2018-08-22 11:06:58 -05:00
Ramakrishna Pallala
1301cc636b arch: arm: nordic_nrf: Add an API to check for valid PM state
Add an API _sys_soc_is_valid_power_state to check if a PM state
is valid or not.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-08-22 08:07:14 -07:00
Wayne Ren
506f21b631 arch: arc: small optimization in mpu driver
to avoid _get_num_regions to access the aux
reg each time in the for loop

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
eab5ff725d arch: arc: put the init context into privileged stack
as the thread is created in privileged mode, the init
context should also be in privileged stack.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
fa9fb831ed arch: arc: re-orgnize the code in _new_thread
re-orginize the code in _new_thread to make it
easier to understand and maintain

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
a1504c3c0d arch: arc: set the right init status for user space
The fake exception return is used to jump to user mode.
So the init status of user thread is in exception mode.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
d68c016793 arch: arc: enable stack check when arc is in secure mode
when arc is in secure mode, SSC bit of sec_stat,
not SC bit of status32,is used to enable stack check.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
f3d2893344 arch: arc: stack check will be disabled in exception
stack check bit of status32/sec_stat will be cleared
automically in exception entry.

so remove the redundent codes

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Diego Sueiro
d1219f4e29 arch/mcimx7_m4: Add i.MX7 Solo Kconfig SoC partnumber define
Adds the proper Kconfig entries for the i.MX7S partnumber presented
on WaRP7 board.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Diego Sueiro
671cb652a1 arch/mcimx7_m4: Add pad, clock and gate config for GPIO7 and UART6
Adds the necessery configuration for using the GPIO7 and UART6 on
i.MX7 platforms.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Anas Nashif
483910ab4b systemview: add support natively using tracing hooks
Add needed hooks as a subsystem that can be enabled in any application.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
a2248782a2 kernel: event_logger: remove kernel_event_logger
Move to more generic tracing hooks that can be implemented in different
ways and do not interfere with the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
ac47070d10 tests: qmsi: remove soc watch sample
Remove this feature specific to QMSI and available through samples only
to allow for migration to tracing hooks.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
b6304e66f6 tracing: support generic tracing hooks
Define generic interface and hooks for tracing to replace
kernel_event_logger and existing tracing facilities with something more
common.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Adithya Baglody
1d27b404a6 tests: benchmarks: timing_info: Enable benchmarks for riscv32.
This patch provides support needed to get timing related
information from riscv32 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
79f65d4db7 tests: benchmarks: timing_info: Enable benchmarks for nios2.
This patch provides support needed to get timing related
information from nios2 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
bb918d85f8 tests: benchmarks: timing_info: Enable benchmarks for xtensa.
This patch provides support needed to get timing related
information from xtensa based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
022588e88d tests: benchmarks: timing_info: Enable benchmarks for ARC.
This patch provides support needed to get timing related
information from ARC based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
db0c5ca08b arch: arc: Added benchmark related hooks.
The benchmark application timing_info needs certain hooks to be
present in the kernel to get the accurate measurements. This
patch adds these hook at all the required locations.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
a8b0b0d5e8 benchmarks: timing_info: Add hooks in the kernel for userspace.
Added sampling hooks in the kernel needed for userspace benchmarks.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Ioannis Glaropoulos
6ee0ad2944 arch: arm: add ASSERT in _get_region_attr_by_type
This commit adds an __ASSERT line in _get_region_attr_by_type,
to signal an error if the supplied MPU region type is not valid.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
b956690520 arch: arm: mpu: explicitly add UL in numerical shift operations
This commit adds a UL suffix after numerical digits to ensure
the correctness of certain shift operations.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2a1fe6e285 arch: arm: implement ARMv8-M MPU driver
This commit implements and integrates the ARMv8-M MPU driver
into the memory protection system for ARM.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2f0e722167 arch: arm: mpu: move ARMv7m-specific functions in internal header
This commit refactors arm_mpu.c by moving all internal function
implementation that is specific to ARMv7-M architecture to a
separate internal header file. This allows to easily extend
arm_mpu.c to support ARMv8-M by including all ARMv8-M-specific
implementation in a similar internal header.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
5a69648061 arch: arm: refactor _get_region_attr_by_conf(.) function
This commit refactors the _get_region_attr_by_conf(.) function,
so it does the following:
 - it is renamed to _get_ram_region_attr_by_conf(), to reflect
   that it is only used to configure RAM MPU regions.
 - it gets an arm_mpu_region_attr_t object structure pointer
   to fill-in with the derived region attributes.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
829781d56e arch: arm: refactor _get_region_attr_by_type() function
This commit refactors the _get_region_attr_by_type(.) function,
so it does the following:
 - it takes an arm_mpu_region_attr_t object pointer and use it
   to fill-in the derived region attributes.
 - it performs only the distinguishing between the different MPU
    region types, hiding the actual MPU-specific implementation
	in internal functions.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).
 - it returs 0 or succes and a negative non-zero integer
   to indicate an error.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
ff919d5fdb arch: arm: adapt region_init(.) to use arm_mpu_region_attr structure
This commit adapts the _region_init(.) function so it can use
the rasr field of the arm_mpu_region_attr structure, when it
configures the RASR register.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Sathish Kuttan
824bcaca52 xtensa: intel_s1000: Add SoC level SYS_INIT
Added a SYS_INIT for SoC level initialization of Intel S1000
Added routines for setting up resource ownership for
    DMA, I2S
Added routine to setup power gating and clock configuration

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-08-19 11:06:09 -07:00
Ulf Magnusson
21e63ed2ae arch: arm: kconfig: Remove redundant FLOAT dependencies
The choice that contains FP_HARDAPI and FP_SOFTAPI already depends on
FLOAT, so the choice symbols don't have to.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-18 07:54:20 -07:00
Daniel Leung
fc182430c0 kernel: userspace: reserve stack space to store local data
This enables reserving little space on the top of stack to store
data local to thread when CONFIG_USERSPACE. The first customer
of this is errno.

Note that ARC, due to how it lays out the user stack and
privilege stack, sets the pointer itself rather than
relying on the common way.

Fixes: #9067

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-08-17 09:40:52 -07:00
Mieszko Mierunski
4f6aac1a67 dts: nrf5: Changed GPIO and GPIOTE define names
Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
15813d343c boards: nrf: Changed GPIO default driver to NRFX shim
I removed GPIO configuration from board files and enabled them
as default in driver Kconfig file. All boards had GPIO ports
enabled that is why I decided to enable it by default.

Power management example was changed to use new driver.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
6d8220d27f drivers: gpio: Add shim for nrfx GPIO and GPIOTE drivers
Added shim implementation gpio_nrfx.c which uses nrfx drivers
for GPIO and GPIOTE

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
e99e363cc0 dts: nrf: Added DTS support for nRF51
DTS for nRF51 was missing, I updated soc and board files to
support DTS properly.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Flavio Ceolin
8aec087268 kernel: Fix bitwise operators with unsigned operators
Bitwise operators should be used only with unsigned integer operands
because the result os bitwise operations on signed integers are
implementation-defined.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-08-16 19:47:41 -07:00
Flavio Ceolin
0866d18d03 irq: Fix irq_lock api usage
irq_lock returns an unsigned int, though, several places was using
signed int. This commit fix this behaviour.

In order to avoid this error happens again, a coccinelle script was
added and can be used to check violations.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-08-16 19:47:41 -07:00
Olivier Martin
945ef745e0 dts/rtc: Introduce binding for STM32 RTC
This commit adds rtc fixup and dts blocks for RTC hardware
on STM32L4.

Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
2018-08-16 13:38:43 -07:00
Kiril Zyapkov
0d47ae4fca drivers: rtc: add support for STM32 RTC
Add support for the STM32 Real-Time-Clock leveraging the LL APIs

Signed-off-by: Johannes Hutter <johannes@proglove.de>
Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
2018-08-16 13:38:43 -07:00
Nathaniel Graff
218d7a0aa9 riscv: Rename the FE310 SoC to Sifive Freedom
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-16 06:23:01 -07:00
Istvan Bisz
ea9d4a79c9 drivers: usb: add support for USB OTG FS on STM32F2
Add support for usbotg_fs, by adding the DT fixup, pinmux macros,
and the DT entries in stm32f2.dtsi.

Signed-off-by: Istvan Bisz <istvan.bisz@t-online.hu>
2018-08-16 06:19:19 -07:00
Sebastian Bøe
1186f5bb29 cmake: Deprecate the 2 symbols _SYSCALL_{LIMIT,BAD}
There exist two symbols that became equivalent when PR #9383 was
merged; _SYSCALL_LIMIT and K_SYSCALL_LIMIT. This patch deprecates the
redundant _SYSCALL_LIMIT symbol.

_SYSCALL_LIMIT was initally introduced because before PR #9383 was
merged K_SYSCALL_LIMIT was an enum, which couldn't be included into
assembly files. PR #9383 converted it into a define, which can be
included into assembly files, making _SYSCALL_LIMIT redundant.

Likewise for _SYSCALL_BAD.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-15 11:46:51 -07:00
Nathaniel Graff
970cfdb88b arch: riscv32: Move MEPC increment in irq_wrapper
Move the MEPC increment logic in __irq_wrapper such that the saved MEPC
is only incremented on a syscall (ecall instruction).

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-15 08:07:41 -05:00
Ulf Magnusson
8cf8db3a73 Kconfig: Use a short, consistent style for prompts
Consistently use

    config FOO
            bool/int/hex/string "Prompt text"

instead of

    config FOO
            bool/int/hex/string
            prompt "Prompt text"

(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).

The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.

Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/
how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-15 04:10:10 -07:00
Ioannis Glaropoulos
bb0b66e15a arch: arm: clean-up "default n" entries in Kconfig option definitions
This commit removes the depreciated "default n" entries from
boolean K-config options in arch/arm.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-15 04:09:16 -07:00
Ulf Magnusson
17f1b0adec Kconfig: Switch to improved globbing statements
A design flaw of 'gsource' is that there's no way to require at least
one file to match the glob pattern. This could lead to silent errors.

Switch to a new design, where a plain 'source' is globbing and requires
at least one file to match. A separate 'osource' (optional source)
statement is available for cases where it's okay for a pattern (or plain
filename) to not match any files.

'orsource' combines 'osource' and 'rsource' (relative source).

This commit search-replaces 'gsource' with 'source', but backwards
compatibility with 'gsource' is still maintained by making it an alias
for 'osource' (and by making 'grsource' an alias for 'orsource').

The three Kconfig files arch/{nios2,posix,xtensa}/Kconfig source
arch/{nios2,posix,xtensa}/soc/*/Kconfig, which doesn't match any files.
Use 'osource' for those. The soc/*/Kconfig files seem to be for
additional SoC-specific symbols, only none exist yet on those ARCHes.

Also use 'osource' for the source of $ENV_VAR_BOARD_DIR/Kconfig in
boards/Kconfig, which doesn't exist for all boards.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-15 04:07:44 -07:00
David Lamparter
c4703661e6 arch: arm: soc: add STM32L433
The L433 chip is a superset of the L432, just grabbing a few additional
interfaces (LCD, I2C2, USART3, SPI2, SDMMC).  All the support/HAL files
are already there, so enabling these is just a matter of build system
setup.

Tested on an application specific board (builds correctly and I2C2
works.)  I unfortunately don't have a nucleo/discovery board to create a
reference board for.

Signed-off-by: David Lamparter <equinox@diac24.net>
2018-08-13 18:59:17 -07:00
Ioannis Glaropoulos
f2bdee356b arch: arm: export entry veneers
When building a Secure firmware image, instruct the linker to
generate a symbol table with the entry veneers, to allow a Non
Secure firmware image to access Secure Entry functions via the
entry veneers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
db3f6aab02 arch: arm: add option to define an NSC region
This commit adds K-config options that allow the user to
signify an ARM Secure Firmware that contains Secure Entry
functions and to define the starting address of the linker
section that will contain the Secure Entry functions. It
also instructs the linker to append the NSC section if
instructed so by the user.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
3b79b283f9 arch: arm: API & implementation of SAU region configuration
This commit contribute an internal ARM API that enables the
user to confgure an ARM Security Attribution Unit region. It
also defines ARM_SAU as a K-config option to indicate that
an MCU implements the ARM SAU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
6e93eea3a3 arch: arm: api to permit/block NS system reset requests
This commit contributes a simple API to allow the TrustZone
user to block or permit Non-Secure System Reset requests.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
d9cfbc280f arch: arm: macro API for defining non-secure entry functions
This commit introduces an internal ARM macro API to allow the
TrustZone user to define Non-Secure entry functions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
a05081804a arch: arm: API macros for CMSE non-secure function pointers
This commit defines and implements and internal ARM macro API
that allows the TrustZone user to declare, define, and evaluate
pointers of non-secure function type.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
f8b5046b13 arch: arm: include GCC -mcmse compile option for secure firmware
Make GCC compile with the -mcmse compile option, if we are
building a Secure firmware. The option will make Security
Extensions for secure executables available, and will set
the corresponding compile-time indicator flag, accordingly:
(i.e. __ARM_FEATURE_CMSE=3).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
ba02c6d91e arch: arm: api for reading MCU SAU regions
Define and implement a function to read the number of
SAU regions configued for the MCU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
5bb3d01580 arch: arm: API to configure Secure exception boost
This commit defines and implements an internal ARMv8-M TrustZone
API to allow the user to select whether Secure exceptions will
have priority boosting over Non-Secure exceptions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
179b8d15f1 arch: arm: API to configure fault target state
This commit defines and implements an internal ARMv8-M TrustZone
API to allow the user to configure the target state of fault
exceptions that are not banked between security states.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
28acaeadc9 arch: arm: add macro definition for vector key write permit value
This commit adds a macro definition for the Vector Key value of
AIRCR register that permits the accompanying writes. The macro
is then used instead of the hard-coded numerical value.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
97d5f60afb arch: arm: configure NS stack pointer limit registers
This commit adds and implements an ARM internal API function
to configure the Non-Secure instance of MSPLIM or PSPLIM.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
de78430072 arch: arm: internal API to enable/disable SAU
This commit defines and implements the internal ARM TrustZone
API to enable or disable the Security Attribution Unit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Ioannis Glaropoulos
034499af1a arch: arm: configure non-secure registers from secure firmware
Define and implement an API to configure the Non-Secure instances
of core registers in ARM Cortex-M23 and Cortex-M33.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 18:58:11 -07:00
Paul Sokolovsky
028aae1ec9 net: config: Rename Kconfig options to correspond to library name
This finishes refactor of splitting off net_config library name from
net_app library, started in c60df1311, c89a06dbc. This commit makes
sure that Kconfig options are prefixed with CONFIG_NET_CONFIG_
instead of CONFIG_NET_APP_, and propagates these changes thru the
app configs in the tree.

Also, minor dependency, etc. tweaks are made.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-08-13 18:42:31 -07:00
Nathaniel Graff
45d5d5db48 boards: riscv: Convert HiFive1 to DTS
Adds DTS bindings for sifive,pwm0, sifive,uart0, sifive,spi0, and
riscv,plic0.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-08-13 18:35:38 -05:00
Ioannis Glaropoulos
b996955e34 arch: arm: optimize _size_to_mpu_rasr_size function
This commit optimizes _size_to_mpu_rasr_size(.) in the ARMv7-M
MPU driver, so it makes use of a single _builtin_clz() function
call, instead of two.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-13 13:00:30 -07:00
Ulf Magnusson
ec3eff57e0 Kconfig: Use the first default with a satisfied condition
Up until now, Zephyr has patched Kconfig to use the last 'default' with
a satisfied condition, instead of the first one. I'm not sure why the
patch was added (it predates Kconfiglib), but I suspect it's related to
Kconfig.defconfig files.

There are at least three problems with the patch:

  1. It's inconsistent with how Kconfig works in other projects, which
     might confuse newcomers.

  2. Due to oversights, earlier 'range' properties are still preferred,
     as well as earlier 'default' properties on choices.

     In addition to being inconsistent, this makes it impossible to
     override 'range' properties and choice 'default' properties if the
     base definition of the symbol/choice already has 'range'/'default'
     properties.

     I've seen errors caused by the inconsistency, and I suspect there
     are more.

  3. A fork of Kconfiglib that adds the patch needs to be maintained.

Get rid of the patch and go back to standard Kconfig behavior, as
follows:

  1. Include the Kconfig.defconfig files first instead of last in
     Kconfig.zephyr.

  2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of
     last in arch/Kconfig.

  3. Include arch/<arch>/soc/*/Kconfig first instead of last in
     arch/<arch>/Kconfig.

  4. Swap a few other 'source's to preserve behavior for some scattered
     symbols with multiple definitions.

     Swap 'source's in some no-op cases too, where it might match the
     intent.

  5. Reverse the defaults on symbol definitions that have more than one
     default.

     Skip defaults that are mutually exclusive, e.g. where each default
     has an 'if <some board>' condition. They are already safe.

  6. Remove the prefer-later-defaults patch from Kconfiglib.

Testing was done with a Python script that lists all Kconfig
symbols/choices with multiple defaults, along with a whitelist of fixed
symbols. The script also verifies that there are no "unreachable"
defaults hidden by defaults without conditions

As an additional test, zephyr/.config was generated before and after the
change for several samples and checked to be identical (after sorting).

This commit includes some default-related cleanups as well:

  - Simplify some symbol definitions, e.g. where a default has 'if FOO'
    when the symbol already has 'depends on FOO'.

  - Remove some redundant 'default ""' for string symbols. This is the
    implicit default.

Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and
BT_L2CAP_TX_MTU (caused by confusing inconsistency).

Piggyback some fixes for style nits too, e.g. unindented help texts.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-10 12:38:28 -07:00
Diego Sueiro
9283ee7acc arch: i.MX add RDC peripheral permission setting for applications cores
This patch adds the RDC (Resource Domain Controller) peripheral
permissions settings for the i.MX applications cores (Cortex A9 on
i.MX6 and Cortex A7 on i.MX7).

This will enable both Linux (on application's core) and Zephyr (on M4
core) to share the peripherals and coexist.

The settings are defined at devicetree level and applied in the soc.c.

A complete solution should involve the SEMA4 to control the peripherals
access and prevent resource deadlocking and misusage.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-09 10:17:32 -05:00
Wayne Ren
37cc2ccc0f arch: arc: fix a bug in mpu driver
for mpu stack guard, after arc_core_mpu_configure,
it should return

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-06 09:40:56 -05:00
Michael Scott
65af15bcc2 boards: arm: nrf52840_pca10056: add settings for WNC-M14A2A modem
These settings enable use of the WNC-M14A2A LTE-M modem as the default
network interface for the nRF52840-DK board (nrf52840_pca10056).

They include the following settings when MODEM_WNCM14A2A is selected:
- UARTE1 pin setup
- DTS / DTS fixup additions for WNC-M14A2A
- Kconfig settings for modem driver

Signed-off-by: Michael Scott <mike@foundries.io>
2018-08-06 10:43:46 +03:00
qianfan Zhao
eab3f3f27f arm: _FaultShow: fix typo MMFSR -> UFSR
The right param should be SCB_UFSR not SCB_MMFSR

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-08-03 08:41:22 -05:00
Kumar Gala
4b22ba7e4b syscall: Move arch specific syscall code into its own header
Split out the arch specific syscall code to reduce include pollution
from other arch related headers.  For example on ARM its possible to get
errno.h included via SoC specific headers.  Which created an interesting
compile issue because of the order of syscall & errno/errno syscall
inclusion.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-08-02 22:06:49 -05:00
Alberto Escolar Piedras
11aa0b8006 posix arch: Do not disable warnings
Initially missing function prototypes warnings and undefined macro
warnings  were disabled to quickly prototype the posix arch and
native_posix board.
But there is no excuse anymore to have this warnings disabled.
=> enable them.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-08-02 19:14:19 +02:00
Alberto Escolar Piedras
4388cde90f arch posix: Allow including XOPEN extensions
The native_posix random driver uses random() and srandom()
whicha are old XOPEN POSIX extension (part of POSIX 2001).

To avoid compiler warnings due to the host libC headers
not including this prototypes otherwise, let's define
this 2 macros.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-08-02 19:14:19 +02:00
Alberto Escolar Piedras
00b07615fa native_posix: Add missing headers and function prototypes
A few function prototypes were missing in the native_posix
board and its drivers.
Let's add them.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-08-02 19:14:19 +02:00
Alberto Escolar Piedras
c0ea40cd74 posix arch: Add missing header
Add missing header in posix arch file

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-08-02 19:14:19 +02:00
Ulf Magnusson
d1684a83a4 Kconfig: Clean up some symbol definitions
- Remove redundant 'n' defaults. 'n' is the default value for bool
  symbols.

  This makes the auto-generated documentation clearer as well: You get
  "implicitly defaults to n" instead of
  "- n if <propagated dependencies>".

- Shorten

      <type>
      prompt "foo"

  to

      <type> "foo"

  This works for all types, not just bool.

- Various formatting nits.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-01 12:47:17 -04:00
Anas Nashif
9426a3cbf9 arch: x86: set output format/arch per arch
Instead of doing this per platform, set the output format and arch on
architecture level.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-31 20:30:33 -04:00
Andrew Boie
b1dec2992e arc: add z_arch_user_string_nlen
Safely measure the length of a potentially dubious string.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-31 07:47:15 -07:00
Andrew Boie
3cef6deb16 arm: add z_arch_user_string_nlen
Uses fixup infrastructure to safely abort if we get an MPU
fault when examining a string passed in from user mode.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-31 07:47:15 -07:00
Andrew Boie
9d3cdb3568 x86: add z_arch_user_string_nlen
Uses fixup infrastructure to safely abort if we get a page
fault while measuring a string passed in from user mode.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-31 07:47:15 -07:00
Alberto Escolar Piedras
550225b668 native: Generalize native tasks
Some drivers or tests need to execute some code before Zephyr is
booted, dynamically register command line arguments, etc.

For this purpose, we generalize the NATIVE_EXIT_TASK to also
provide hooks to run a function at a given point during the startup
of native_posix.

Also, test/boards/native_posix/exit_tasks is generalized to cover
this new functionality.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-07-30 22:13:46 -04:00
Daniel Leung
b3e68703b5 arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs
This adds PCI related configuration for UARTs and I2C controllers
to the Apollo Lake SoC configuration to support PCI devices.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-27 17:16:18 -04:00
Daniel Leung
88f4b68165 arch/x86: apollo_lake: add MMU regions for I2C controllers
The Apollo Lake SoC has 8 I2C controllers. The MMU regions are
added to allow access.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-27 17:16:18 -04:00
Daniel Leung
67b48ab2a8 drivers/i2c: i2c_dw: extends driver to support 8 controllers
This adds the necessary driver structs to support a total of 8
I2C controllers. This also allows each I2C controller to have
its own PCI vendor/device IDs.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-27 17:16:18 -04:00
Yannis Damigos
fe321f02fa arch: st_stm32: Fix IRQs number of various SoCs
It corrects the IRQs number of various SoCs.
IRQs number is in conformity with the IRQn_Type
enumeration in SoC header files of STM32Cube
HAL.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-26 08:24:04 -05:00
Andrew Boie
97c06a7ab3 arm: fix assembler offset errors on Cortex-M0
In some kernel configurations, the offset can be greater
than the maximum of 124 for ldr/str immediate offsets.

Fixes: #9113

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-25 20:04:29 -04:00
Shawn Mosley
573f32b6d2 userspace: compartmentalized app memory organization
Summary: revised attempt at addressing issue 6290.  The
following provides an alternative to using
CONFIG_APPLICATION_MEMORY by compartmentalizing data into
Memory Domains.  Dependent on MPU limitations, supports
compartmentalized Memory Domains for 1...N logical
applications.  This is considered an initial attempt at
designing flexible compartmentalized Memory Domains for
multiple logical applications and, with the provided python
script and edited CMakeLists.txt, provides support for power
of 2 aligned MPU architectures.

Overview: The current patch uses qualifiers to group data into
subsections.  The qualifier usage allows for dynamic subsection
creation and affords the developer a large amount of flexibility
in the grouping, naming, and size of the resulting partitions and
domains that are built on these subsections. By additional macro
calls, functions are created that help calculate the size,
address, and permissions for the subsections and enable the
developer to control application data in specified partitions and
memory domains.

Background: Initial attempts focused on creating a single
section in the linker script that then contained internally
grouped variables/data to allow MPU/MMU alignment and protection.
This did not provide additional functionality beyond
CONFIG_APPLICATION_MEMORY as we were unable to reliably group
data or determine their grouping via exported linker symbols.
Thus, the resulting decision was made to dynamically create
subsections using the current qualifier method. An attempt to
group the data by object file was tested, but found that this
broke applications such as ztest where two object files are
created: ztest and main.  This also creates an issue of grouping
the two object files together in the same memory domain while
also allowing for compartmenting other data among threads.

Because it is not possible to know a) the name of the partition
and thus the symbol in the linker, b) the size of all the data
in the subsection, nor c) the overall number of partitions
created by the developer, it was not feasible to align the
subsections at compile time without using dynamically generated
linker script for MPU architectures requiring power of 2
alignment.

In order to provide support for MPU architectures that require a
power of 2 alignment, a python script is run at build prior to
when linker_priv_stacks.cmd is generated.  This script scans the
built object files for all possible partitions and the names given
to them. It then generates a linker file (app_smem.ld) that is
included in the main linker.ld file.  This app_smem.ld allows the
compiler and linker to then create each subsection and align to
the next power of 2.

Usage:
 - Requires: app_memory/app_memdomain.h .
 - _app_dmem(id) marks a variable to be placed into a data
section for memory partition id.
 - _app_bmem(id) marks a variable to be placed into a bss
section for memory partition id.
 - These are seen in the linker.map as "data_smem_id" and
"data_smem_idb".
 - To create a k_mem_partition, call the macro
app_mem_partition(part0) where "part0" is the name then used to
refer to that partition. This macro only creates a function and
necessary data structures for the later "initialization".
 - To create a memory domain for the partition, the macro
app_mem_domain(dom0) is called where "dom0" is the name then
used for the memory domain.
 - To initialize the partition (effectively adding the partition
to a linked list), init_part_part0() is called. This is followed
by init_app_memory(), which walks all partitions in the linked
list and calculates the sizes for each partition.
 - Once the partition is initialized, the domain can be
initialized with init_domain_dom0(part0) which initializes the
domain with partition part0.
 - After the domain has been initialized, the current thread
can be added using add_thread_dom0(k_current_get()).
 - The code used in ztests ans kernel/init has been added under
a conditional #ifdef to isolate the code from other tests.
The userspace test CMakeLists.txt file has commands to insert
the CONFIG_APP_SHARED_MEM definition into the required build
targets.
  Example:
        /* create partition at top of file outside functions */
        app_mem_partition(part0);
        /* create domain */
        app_mem_domain(dom0);
        _app_dmem(dom0) int var1;
        _app_bmem(dom0) static volatile int var2;

        int main()
        {
                init_part_part0();
                init_app_memory();
                init_domain_dom0(part0);
                add_thread_dom0(k_current_get());
                ...
        }

 - If multiple partitions are being created, a variadic
preprocessor macro can be used as provided in
app_macro_support.h:

        FOR_EACH(app_mem_partition, part0, part1, part2);

or, for multiple domains, similarly:

        FOR_EACH(app_mem_domain, dom0, dom1);

Similarly, the init_part_* can also be used in the macro:

        FOR_EACH(init_part, part0, part1, part2);

Testing:
 - This has been successfully tested on qemu_x86 and the
ARM frdm_k64f board.  It compiles and builds power of 2
aligned subsections for the linker script on the 96b_carbon
boards.  These power of 2 alignments have been checked by
hand and are viewable in the zephyr.map file that is
produced during build. However, due to a shortage of
available MPU regions on the 96b_carbon board, we are unable
to test this.
 - When run on the 96b_carbon board, the test suite will
enter execution, but each individaul test will fail due to
an MPU FAULT.  This is expected as the required number of
MPU regions exceeds the number allowed due to the static
allocation. As the MPU driver does not detect this issue,
the fault occurs because the data being accessed has been
placed outside the active MPU region.
 - This now compiles successfully for the ARC boards
em_starterkit_em7d and em_starterkit_em7d_v22. However,
as we lack ARC hardware to run this build on, we are unable
to test this build.

Current known issues:
1) While the script and edited CMakeLists.txt creates the
ability to align to the next power of 2, this does not
address the shortage of available MPU regions on certain
devices (e.g. 96b_carbon).  In testing the APB and PPB
regions were commented out.
2) checkpatch.pl lists several issues regarding the
following:
a) Complex macros. The FOR_EACH macros as defined in
app_macro_support.h are listed as complex macros needing
parentheses.  Adding parentheses breaks their
functionality, and we have otherwise been unable to
resolve the reported error.
b) __aligned() preferred. The _app_dmem_pad() and
_app_bmem_pad() macros give warnings that __aligned()
is preferred. Prior iterations had this implementation,
which resulted in errors due to "complex macros".
c) Trailing semicolon. The macro init_part(name) has
a trailing semicolon as the semicolon is needed for the
inlined macro call that is generated when this macro
expands.

Update: updated to alternative CONFIG_APPLCATION_MEMORY.
Added config option CONFIG_APP_SHARED_MEM to enable a new section
app_smem to contain the shared memory component.  This commit
seperates the Kconfig definition from the definition used for the
conditional code.  The change is in response to changes in the
way the build system treats definitions.  The python script used
to generate a linker script for app_smem was also midified to
simplify the alignment directives.  A default linker script
app_smem.ld was added to remove the conditional includes dependency
on CONFIG_APP_SHARED_MEM.  By addining the default linker script
the prebuild stages link properly prior to the python script running

Signed-off-by: Joshua Domagalski <jedomag@tycho.nsa.gov>
Signed-off-by: Shawn Mosley <smmosle@tycho.nsa.gov>
2018-07-25 12:02:01 -07:00
Aurelien Jarno
97bc5abedf drivers: i2c: stm32: add support for STM32F7
The STM32F7 uses the V2 version of the STM32 I2C controller. Add the
corresponding Kconfig, DTS, DTS fixup and pinmux entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-25 07:19:12 -04:00
Yannis Damigos
302494d35a arch: stm32f4/f7: Add OTG HS defines to dts fixup file
Add OTG HS defines to dts fixup file for STM32 F4 and
F7 series

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-24 22:27:17 -04:00
Zide Chen
98775f34c3 kconfig: decouple realmode boot from CONFIG_JAIHOUSE
Add CONFIG_REALMODE item so that it's possible to configure other
x86 boards to boot from real mode.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-07-24 15:37:09 -07:00
Ioannis Glaropoulos
90b64489e5 arch: arm: allow processor to ignore/recover from faults
This commit adds the implementation that allows the ARM CPU
to recover from (otherwise fatal) MPU faults. A new error
reason, _NANO_ERR_RECOVERABLE, is introduced. The error
reason is used to suppress fault dump information, if the
error is actually recoverable.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-23 10:50:30 -07:00
Ioannis Glaropoulos
f713fa5d52 arch: arm: re-organize arm fault handling
This commit does several things:
- It unifies the way the fault inspection is implemented,
  irrespective of the selected fault dumping level.
- It removes the dumping of the Thread ID and faulting
  instruction address, as these are now displayed by
  _NanoFatalErrorHandler.
- It introduces a new debug print directive, to be used
  for the highest dumping level (2).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-23 10:50:30 -07:00
Ioannis Glaropoulos
afef645279 arch: arm: Call NanoFatalErrorHandler and split out Secure stack dump
This commit implements two changes.
- It splits out the dumping of the Secure stack information to a
  separate function. Dumping will only occur if the highest dump
  level has been selected.
- Forces _Fault() to invoke _NanoFatalErrorHandler, instead of
  _SysFatalErrorHandler. In addition, early return statemets are
  implemented in _Fault(), so the fatal error handler is only
  invoked once.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-23 10:50:30 -07:00
Ioannis Glaropoulos
f4645561f9 arch: arm: improve documentation of _Fault(.)
This commit improves the documentation of function _Fault(.),
in order to better describe the actual implementation and the
use of the function arguments.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-23 10:50:30 -07:00
Andrew Boie
17282578a9 arc: fix update of ERET on exc return
This code path for returning from an exception wasn't
updating ERET with ESF->pc, resulting in any updates to
the PC by the fault handler being ignored.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-20 14:13:09 -04:00
Ramakrishna Pallala
fe48f743f3 arch: arc: Fix Deep Sleep hang issue on Quark SE(ARC)
Fixed the RTC interrupt masking issue on Deep Sleep entry by
explicitly unmasking it on Deep Sleep exit sequence.

Re-oredered the SoC power states such that SYS_POWER_STATE_CPU_LPS is
the lowest possible Low Power State(LPS) and SYS_POWER_STATE_CPU_LPS_2
is the highest possible Low Power State(LPS). This is need to maintain
the LPS state consistency across different architectures.

Also re-mapped the Low Power States and Deep Sleep States as per
Quark SE C1000 data sheet document under Power Management section.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-07-19 17:12:58 -04:00
Ramakrishna Pallala
2e615181f0 arch: x86: Reorder the SoC power states for Quark SE
Re-oredered the SoC power states such that SYS_POWER_STATE_CPU_LPS is
the lowest possible Low Power State(LPS) and SYS_POWER_STATE_CPU_LPS_2
is the highest possible Low Power State(LPS). This is need to maintain
the LPS state consistency across different architectures.

Also removed the redundant SYS_POWER_STATE_DEEP_SLEEP_2 state.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-07-19 17:12:58 -04:00
Niranjhana N
414c39fc94 posix: add pthread_key and pthread_once APIs
Added 4 new pthread_key APIs for thread-specific data
key creation, deletion, setting and getting the values.

Added a key list to the posix_struct for threads.

Added pthread_once API.

Signed-off-by: Niranjhana N <niranjhana.n@intel.com>
2018-07-19 08:46:33 -04:00
Alberto Escolar Piedras
15d847add8 native: Add NATIVE_EXIT_TASK hooks
Some of the native application components or drivers need to
do a proper cleanup before the executable exits.
So we provide a macro similar to SYS_INIT but which will be
called just before exiting.
This can be used for freeing up resources, closing descriptors,
or doing any neccessary signaling to any other host process.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-07-18 15:43:12 -04:00
Andrei Emeltchenko
8a86931e8a board: quark_se_c1000: Add default setting for cc2520 radio
Add default settings for cc2520 radio.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2018-07-18 08:23:00 -04:00
Diego Sueiro
d99f6ada84 arch: Add support for i.MX PWM
Adds definitions, devicetree entries and clock controller
configurations for PWM peripheral.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-17 16:08:22 -05:00
Diego Sueiro
c2454309de arch: Add i.MX7 PWM get clock frequency function
This patch adds the get_pwm_clock_freq function to be used by the
i.MX PWM driver.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-17 16:08:22 -05:00
Daniel Leung
26e83aab35 arch/x86/soc: add SoC configuration for Apollo Lake
This adds the SoC configuration for Apollo Lake. This is based
on the Atom configuration.

Origin: Original

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 16:27:52 -04:00
Ioannis Glaropoulos
6e41f9e181 arch: arm: enable/disable MPU using API functions
This commit forces arm_mpu_init() to use the provided API
functions to enable and disable the MPU. Besides the clean-up
the commit enforces the MPU driver to use data and instruction
synchronization barriers every time the MPU is enabled. This
is aligned with the programming recommendations by ARM.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-16 20:56:25 -04:00
Anas Nashif
942ab7ed35 esp32: include register headers in soc.h
This fixes a build issue on esp32 that was introduced recently with the
merge of an old PR.

Include the register headers in soc.h rather than soc.c and make them
available to other code via soc.h

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-16 19:00:32 -04:00
Ramakrishna Pallala
a20cc9e78b arch: arm: nrf52: Enable interrupts on wake up from sleep
Enable the interrupts on wake up from low power states

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-07-15 22:48:34 -04:00
Vitor Massaru Iha
f8718758e5 include: drivers: gpio: Turn functions generic - esp32
On 'drivers/i2c_esp32.c' there are functions useful for other
drivers. Functions and struct went moved to:

 * arch/xtensa/soc/esp32/peripheral.h
 * arch/xtensa/soc/esp32/soc.h
 * include/drivers/gpio/gpio_esp32.h

Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
2018-07-15 16:13:36 -04:00
Jakub Rzeszutko
f0de6e06f8 drivers: serial: nrf: Serial driver modification to use DT
1. dts.fixup files updated with peripheral address and IRQ NUMBER.
2. Peripheral address is taken from DT.
3. IRQ number is taken from DT.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-07-13 11:08:03 +02:00
Ulf Magnusson
3cb9018e23 arch: x86: Kconfig: Fix CACHE_LINE_SIZE default for CPU_ATOM
With Zephyr's prefer-later-defaults behavior, the default value of
CACHE_LINE_SIZE was always 0, because 'default 0' acts like
'default 0 if y'.

Change the code to what was probably the intention (default to 0 unless
CPU_ATOM).

It looks like CACHE_LINE_SIZE is never used in the code when
CACHE_LINE_SIZE_DETECT is on, so maybe things could be simplified
further.

Piggy-back some prompt style consistency cleanups.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-12 23:08:43 -04:00
Ioannis Glaropoulos
8bfddb52e5 arch: arm: mpu: fix _get_region_ap(.) function
This commit fixes a bug in _get_region_ap(.) by adding
parentheses to enforce the correct operator precedence.

Fixes #8864.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-12 13:00:37 -05:00
Aurelien Jarno
9107e3dac8 drivers: usb: add support for USB OTG FS on STM32F7
The STM32F7 uses the same USB OTG FS controller than the STM32F4 series.
It is therefore trivial to add support for it, by adding the DT fixup
and pinmux macros, and the DT entries in stm32f7.dtsi. Keep it disabled,
it should be enabled at the board level.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-11 16:28:10 -05:00
Aurelien Jarno
8d1664c2f7 arch: arm: mpu: enable WBWA caching on per thread user RAM
Update _get_region_attr_by_type used to set up the user regions
on a per thread basis to match the REGION_USER_RAM_ATTR macro. Caching
attributes were set "Outer and inner write-through. No write allocate.",
this patch changes it to "Outer and inner write-back. Write and read
allocate.".

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-11 10:55:31 -04:00
Wayne Ren
d27aadf941 arch: arc: add nsim support in soc
add nsim soc support, two configs are contained

* em with arc MPUv2
* em with arc SecureShield and MPUv3

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-07-10 19:05:13 -04:00
Kumar Gala
d76e39f8d3 arch: atmel_sam0: Fix Kconfig warnings
We were missing a few SOC_PART_NUMBER.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-10 15:28:32 -05:00
Sean Nyekjaer
781a2f0275 arch: add support SAMD20 used in the SAMD20 Xplained Pro Board
This add basic support the SAMD20 inkl. SPI and UART

Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
2018-07-10 12:56:44 -05:00
Sean Nyekjaer
31aaf07719 arch: atmel_sam0: move clk config options to common Kconfig
The SAMD0 Family have almost the same clock options.
The samd20 and samd21 only clocks is not implemented yet.

Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-10 12:56:44 -05:00
Christian Taedcke
6d5206e7b0 arm: exx32: Add additional include to efm32wg soc.h
This keeps the efm32wg soc.h in sync with the efr32fg1p soc.h.
This include is currently not necessary, but will be for further
peripheral drivers.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-07-10 12:53:50 -05:00
Christian Taedcke
496b799474 arm: exx32: Add Silabs EFR32FG1P soc files
The Silicon Labs EFR32FG1 Flex Gecko MCU includes:
	* Cortex-M4F core at 40MHz
	* up to 256KB of flash and 32KB of RAM
	* integrated Sub-GHz and/or 2.4GHz radio
	* multiple low power peripherals

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-07-10 12:53:50 -05:00
Maureen Helm
530a71310e arm: nxp: mpu: Consolidate k64 mpu regions
Reduces the number of mpu regions statically reserved at boot time by
one, giving a total of five. We originally sought to reduce the total to
three: 1 background region with lowest precendence for supervisor r/w, 1
flash region, and 1 sram region. However, the nxp mpu hardware does not
give precedence to any region over another, and thus we cannot revoke
access from the background region with a higher priority region. This
means we cannot support hardware stack protection with a single
background region.

Instead, create two background regions that cover the entire address
space, except for sram.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-07-10 12:46:04 -04:00
Kumar Gala
b3d34d2e4c arch: arm: nrf52: Support UARTE defines in dts.fixup
If we select UART0 as UARTE we will get different defines from the
generation script.  Support both UART and UARTE for UART0.  Also fixup
UART1 defines since this will always be UARTE.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-10 08:54:30 -05:00
Diego Sueiro
970c4f9cf3 arch: Add imx7d_m4 i2c definitions
Adds all necessary i2c definitions and configurations for imx7d_m4 soc.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-06 15:55:57 -05:00
Yong Jin
8776835bd6 arch: arm: stm32: add basic support for STM32F769 SoC
The STM32F769 has more interrupts and features than the STM32F746,
but the basic support is similar with STM32F746

Signed-off-by: Yong Jin <jinyong.iot@foxmail.com>
2018-07-06 09:56:25 -05:00
Istvan Bisz
5aaf827a3e arch: arm: stm32f2: remove core zephyr header inclusions from soc.h
The stm32f2 version of soc.h misses the changes done in commit
aee97be ("arch: arm: soc: remove core zephyr header inclusions
from soc.h").

Signed-off-by: Istvan Bisz <istvan.bisz@t-online.hu>
2018-07-06 09:47:18 -05:00
Yannis Damigos
4e26f9c3a6 arch: stm32f0/f1/f3/l0: remove core zephyr header inclusions
Apply the changes done in commit aee97be to F0, F1, F3, L0 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-06 09:46:09 -05:00
Maureen Helm
41dd6622ce arm: Print NXP MPU error information in BusFault dump
The NXP MPU triggers a bus fault when a memory access error occurs. Add
support in the bus fault handler to dump error details from the NXP MPU,
including the port number, mode (supervisor or user), address, bus
master number, and regions.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-07-05 13:42:40 -05:00
Kumar Gala
889b290a98 arch: arm: beetle: Pull in CMSDK header for CMSIS support on Beetle
Pulled CMSDK_BEETLE.h from mbed-os as a starting point to enable CMSIS
support on Beetle.  Trimed the file down that what we need on Zephyr
(dropped Device Specific Peripheral Section and system_CMSDK_BEETLE.h).

This lets us drop soc_mpu.h which duplicates MPU info that is defined in
CMSIS headers.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-05 13:40:27 -05:00
qianfan Zhao
7e2f6ebc7b stm32f2: add stm32f207xe soc
Used and tested(blinky, hello_world) on out of tree custom board.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
bdeece01b8 driver: uart_stm32: add support for stm32f2 series
clear RXNE flag in fifo_read, remove TEACK and REACK
check when uart_stm32_init because stm32f2 doesn't
has those flags.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
dffac9ab74 driver: interrupt_controller: Add support for stm32f2
Add kconfig and c code for stm32f2 interrupt controller driver

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6fb7b04461 drivers: stm32-gpio: Provide GPIO driver for stm32f2
Add necessary GPIO defines for the stm32f2 series soc

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6091a7fd50 drivers: clock_control: Add support for stm32f2
Add clock control support for the stm32f2

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
85d2633af2 stm32f2: add stm32f207xg soc
Add stm32f207xg soc to make nucleo-f207zg work.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6511c4122d arm: stm32f2: Add support for stm32f2 series
Add necessary kconfig and DTS files for stm32f2 series

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
Findlay Feng
a36bd915af arch: ARM: Change the march used by cortex-m0 and cortex-m0plus
Use -march=armv6s-m to ensure the svc directive exists

Signed-off-by: Findlay Feng <i@fengch.me>
2018-07-04 16:46:40 -04:00
Ioannis Glaropoulos
df41ed885a arch: arm: mpu: replace literals with CMSIS bitsets
This commit refactors internal functions in arm_mpu.c to use
bitsets and functions taken directly from ARM CMSIS instead of
hardcoded arithmetic literals. In several internal functions
some part of the implementation is abstracted further in inline
functions or convenience macros, to facilitate extending the
arm_mpu.c for ARMv8-M. In addition, the commit adds minor
improvements in internal function documentation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-04 08:25:02 -04:00
Ioannis Glaropoulos
d1944109a9 arch: arm: abstract MPU attribute generation in inline function
This commit abstracts the attribution generation for an MPU
region, determined based on a supplied configuration and the
given size, from the actual implementation, which is placed
in a separate inline function. This allows to have multiple
implementations of attribution generation for different ARM
MPU drivers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-04 08:25:02 -04:00
Ioannis Glaropoulos
2b79fceb84 arch: arm: refactor _region_init(..) function
This commit refactors the _region_init(..) internal MPU driver
function so it gets the region index and a struct arm_mpu_region
as aruments. The latter holds the MPU region configuration that
is to be applied to the region determined by the index argument.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-04 08:25:02 -04:00
Ioannis Glaropoulos
e202e04499 arch: arm: nrf: conditionally compile mpu_regions.c
This commit enforces conditional compilation of mpu_regions.c
in nrf52/CMakeLists.txt depending on whether ARM_MPU_NRF52X
K-option is defined.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-04 08:21:58 -04:00
Aurelien Jarno
5aa09c6baa drivers: entropy: stm32: add support for STM32F7
All the STM32F7 SoCs have a TRNG. Adding support for it is just a matter
of tweaking the #ifdef and including the right file from HAL.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-03 22:48:08 -04:00
Ioannis Glaropoulos
1ed37e77ce arch: arm: beetle: duplicate ARM MPU registers' definition
Duplicate the ARM MPU-related registers' definitions
specifically for Beetle SOC which is not compliant with
ARM CMSIS and does not include the ARM CMSIS headers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 18:43:10 -04:00
Ioannis Glaropoulos
559249ee01 arch: arm: Remove redundant HAL definition for ARM MPU
This commit removes the redundant HAL definition for the ARM
Cortex-M MPU registers, and modifies the ARM MPU driver
implementation to directly use the provided HAL from CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 18:43:10 -04:00
Sebastian Bøe
347f9a0a2d cmake: LD: Specify the entry point in the linker scripts
The entry point can and therefore should be set by linker
scripts. Whenever possible one should express things in the source
language, be it .c or .ld, and not in code generators or in the build
system.

This patch removes the flag -eCONFIG_KERNEL_ENTRY from the linker's
command line and replaces it with the linker script command

ENTRY(CONFIG_KERNEL_ENTRY)

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-07-03 17:18:14 -04:00
Ioannis Glaropoulos
d20dac8254 arch: arm: minor refactor in arm_core_mpu_configure_user_context
This commit refactors arm_core_mpu_configure_user_context() so
it can use directly arm_core_mpu_configure().

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 17:11:14 -04:00
Ioannis Glaropoulos
33d3f14b15 arch: arm: add compile-time guards for arm_mpu code
This commit places all the implementation in arm_mpu.c within
build-time guards, ensuring that it is compiled-in only if the
kernel features requiring MPU are present (i.e. USERSPACE,
APPLICATION_MEMORY, or MPU_STACK_GUARDS). An exception to that
is the code required for MPU initialization, which is left out,
as MPU initialization occurs always if MPU is present.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 17:11:14 -04:00
Leandro Pereira
91220ba640 boards: native_posix: Add option to build with Address Sanitizer
Address Sanitizer helps finding issues related to memory: buffer
overflows, usage of uninitialized memory, etc.  This is available in
both Clang and GCC for a while, and, since the POSIX port is only
meant for testing, this will help find issues.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-07-03 17:06:25 -04:00
Aurelien Jarno
6ee562b754 arch: arm: stm32: add basic support for STM32F723 SoC
The STM32F723 has more interrupts than the STM32F746 due to the
additional SDMMC controller. Besides that the changes are very
similar to the ones of the STM32F746.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-03 13:53:36 -05:00
Ioannis Glaropoulos
059952c8e1 arch: arm: update compile options for DSP
This commit updates the compile options in cmake to distinguish
between ARMv8-M Mainline MCUs with or withouth the optional DSP
extension. A new Kconfig option: ARMV8_M_DSP, is introduced, to
signify the use of an ARMv8-M MCU with DSP support.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 12:17:13 -05:00
Piotr Zięcik
97adff57f1 arch: arm: nrf: Enable SEGGER RTT on all Nordic SoCs
All chips from nRF51 and nRF52 series support Segger RTT,
so we can enable it if given series is used.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-07-03 17:51:50 +02:00
Ioannis Glaropoulos
e325510d59 arch: arm: nrf: minor header files' clean up in soc/nrfx
This commit cleans up source files in soc/nrf51 soc/nrf52
folders by removing unnecessary header inclusions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-02 16:50:10 +02:00
Ioannis Glaropoulos
0677812910 arch: arm: nrf: remove kernel_includes.h from nRF5x soc.h inclusions
This commit removes the inclusion of kernel_includes.h from
the nRF51 and nRF52 soc.h headers. This prevents from an
inclusion cycle formation on soc.h. In the wake of
kernel_includes.h removal, necessary header files have been
added in several source files to be able to compile Zephyr for
nRF5x SOCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-02 16:50:10 +02:00
Anas Nashif
bebda565b5 clang: fix for x86 iamcu
Clang, build IAMCU with -miamcu.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-01 22:58:09 +02:00
Anas Nashif
72edc4e15f clang/llvm: add initial configuration file for clang
Add an LLVM backend and a clang toolchain variant to support building
with llvm coming with popular Linux distributions.

This has been tested with X86 boards:
- quark_d2000_crb
- quark_se_c1000_devboard/Arduino 101

Use:

export ZEPHYR_TOOLCHAIN_VARIANT=clang

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-01 22:58:09 +02:00
Ioannis Glaropoulos
7c9a1f0f76 arch: arm: soc: add explanatory comment for kernel headers' inclusion
This commit adds an explanatory comment in all soc.h headers,
where kernel_includes.h header has been included, to stress out
that this header must be included after SOC-specific headers are
brought in. The reason is the fact that kernel_includes.h needs
the ARM CMSIS definitions, which are brought in by the
SOC-specific header inclusions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-29 17:53:15 -05:00
Aurelien Jarno
fa83a4d131 arch: arm: stm32f7: remove core zephyr header inclusions from soc.h
The stm32f7 version of soc.h misses the changes done in commit
aee97be710 ("arch: arm: soc: remove core zephyr header inclusions
from soc.h") as it was not merged at that time. Fix that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-29 11:52:51 -05:00
Alberto Escolar Piedras
2889f5f02c native: Do not ignore format-truncation warnings
Reverting 5124711d87
as issue #5732 is no more.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-28 19:58:55 +02:00
Kumar Gala
e860775873 Revert "arch: arm: stm32: correct include issue"
This reverts commit 30529da0e4.

We should include SoC headers from HALs before we include
kernel_includes.h.  On ARM this is needed because we tend to get CMSIS
related defines setup by the HAL headers.

Fixes: #8593

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-06-28 10:54:38 -05:00
Yurii Hamann
1fdc790ca2 serial: stm32: STM32F7 UART support
The patch adds serial driver support for STM32F7 family
microcontrollers, includes pinmux definitions and DTS fixup file.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
a229500d23 drivers: gpio: stm32: STM32F7 GPIO support
This patch adds GPIO support for STM32F7 family microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
cfb25c74a0 drivers: flash: stm32: STM32F7 flash memory suport
Added flash memory support for STM32F7 family microcontrollers

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
4df673f3fc drivers: clock_control: STM32F7 family clock control
This patch adds clock control support for STM32F7 family
microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
7d8d280db3 arch: arm: stm32: Basic STM32F7 family support
The patch includes support for STM32F746xG subfamily.
Related to issue #6981.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
qianfan Zhao
e7205be03d arch: stm32: Enable HAS_SEGGER_RTT on all stm32 SoCs
Enable HAS_SEGGER_RTT to allow user to select use of SEGGER RTT
and SystemView solution.

SEGGER provide a firmware that can convent ST-Link to J-Link,
And RTT is supports all stm32 SoCs, so lets enable RTT default

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-06-27 15:48:38 -05:00
Andrew Boie
8bcffefb33 arch: arm: clean up MPU code for ARM and NXP
* We are now *much* better at not reserving unnecessary
system MPU regions based on configuration. The #defines
for intent are now an enumerated type. As a bonus, the
implementation of _get_region_index_by_type() is much
simpler. Previously we were wasting regions for stack guard
and application memory if they were not configured.

* NXP MPU doesn't reserve the last region if HW stack
protection isn't enabled.

* Certain parts of the MPU code are now properly ifdef'd
based on configuration.

* THREAD_STACK_REGION and THREAD_STACK_USER_REGION was a
confusing construction and has now been replaced with
just THREAD_STACK_REGION, which represents the MPU region
for a user mode thread stack. Supervisor mode stacks
do not require an MPU region.

* The bounds of CONFIG_APPLICATION_MEMORY never changes
and we just do it once during initialization instead of
every context switch.

* Assertions have been added to catch out-of-bounds cases.

Fixes: #7384

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-06-27 12:56:38 -07:00
Christophe Priouzeau
30529da0e4 arch: arm: stm32: correct include issue
This commit correct the issue introduce by aee97be which
changed the order of header inclusion that lead
to warning generation at compilation, that truend into errors
in CI.
This commit reinstantiate the initial header inclusion order.

Fixes #8563
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
2018-06-27 12:35:27 -05:00
Ulf Magnusson
f1f1fb41bd arch: arm: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Also simplify the definition of CC3220SF_DEBUG. 'default's can be other
symbols too, not just literal values. The condition for the symbol to be
visible (user-configurable) can be put directly on the prompt as well.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
f428d8dacf arch: arc: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Also fix the 'default' on XIP. Due to Zephyr's prefer-later-defaults
behavior, it was always set to 'y' (when the dependencies were
satisfied).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
8cb6fb7223 arch: xtensa: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
b0156b2c48 arch: nios: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
81d61601a8 arch: riscv32: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
87ecbe7f48 arch: x86: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson
aed5e360ee arch/Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Sebastian Bøe
a1e806bf44 gen_isr_tables: Delete the dead code accompanying .intList.num_isrs
intList has been populated with the number of isrs, aka interrupts,
but nothing has not been using this information so we drop it and
everything used to construct it.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-25 12:54:49 -07:00
Carles Cufi
0f6bd5c891 arch: arm: nrf: Add support for the nRF52810
The nRF52810 is a low-cost variant of the nRF52832, with a reduced set
of peripherals and memory. This commit adds basic support for it in the
arch SoC and dts folders.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Ioannis Glaropoulos <ioannis.glaropoulos@nordicsemi.no>
2018-06-25 19:34:33 +02:00
Maureen Helm
54d1a608ff imxrt1050: Disable low-power modes
The imxrt1050 is configured to use SYSTICK for the kernel timer, but
SYSTICK cannot wake up the soc from low-power modes. Disable low-power
modes on this soc until we have support for an alternative timer.

This fixes k_sleep on the EVKB version of the mimxrt1050_evk board. An
earlier version of the board (EVK, not EVKB), had A0 silicon which
by default did not enter low-power mode on a wfi.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-06-23 11:00:20 +02:00
Johann Fischer
c36e800e8e usb: remove all CONFIG_*_EP_ADDR options
Remove all CONFIG_*_EP_ADDR options but keep the default
values for it, as they are necessary to find ep_addr in
usb_ep_cfg_data associated with bEndpointAddress in
interface descriptor.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-06-22 12:30:55 -04:00
Ioannis Glaropoulos
aee97be710 arch: arm: soc: remove core zephyr header inclusions from soc.h
This commit removes the direct inclusions of device.h or gpio.h
from soc.h header files in ARM SOCs, to avoid soc.h include
kernel.h.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-21 22:28:00 +02:00
Bartosz Sokolski
92778e4438 arch: soc: nrf52: add UART1 to dts fixup
Current fixup supports only UART0 while there is also UART1

Signed-off-by: Bartosz Sokolski <bartosz.sokolski@nordicsemi.no>
2018-06-21 13:49:13 +02:00
Sebastian Bøe
aed0b6c4bd isr_tables: Simplify how the sw_irq_handler function is used
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

It is equivalent to the simplification that was done with
_irq_spurious here:
https://github.com/zephyrproject-rtos/zephyr/pull/7574

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-20 15:39:29 -04:00
Joakim Andersson
5204fd7061 arch: arm: Set Zero Latency IRQ to priority level zero:
Set Zero Latency IRQ to priority level zero and SVCs to priority level
one when Zero Latency IRQ is enabled.
This makes Zero Zatency truly zero latency when the kernel has been
configured with userspace enabled, or when IRQ offloading is used.

Exceptions can still delay Zero Latency IRQ, but this is considered
ok since exceptions indicate a serious error, and the system needs to
recover.

Fixes: #7869

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2018-06-20 18:05:02 +02:00
Karol Gugala
1765d75ff4 riscv32: riscv-privilege: Microsemi Mi-V support
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Karol Gugala
23a5b5d171 riscv32: riscv-privilege: integrate common code
This commit moves code from fe310 platform into RISC-V privilege common
folder. This way the code can be reused by other platforms in future.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Mieszko Mierunski
dc1c2742b6 boards: nrf: Moved SDA and SCL pin configuration to DTS for nRF boards
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Stanislav Poboril
631eedd334 arch: Add imx6sx m4 soc support
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-06-19 17:08:51 -05:00
Sebastian Bøe
8f321b48ac isr_tables: Simplify how the spurious irq function address is found
Instead of finding the address of the spurious irq function in the
intList section we now rely on the linker to find the address in the
_irq_spurious symbol.

This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

In this specific case it makes the generated code 'irq_tables.c'
easier to read as we replace magic numbers with the &_irq_spurious
token.

Also, the path through the build system that _irq_spurious makes is
much shorter, so it is much easier for a user to understand how it is
used.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-19 13:46:35 -07:00
Ioannis Glaropoulos
bf15988510 arch: arm: beetle: duplicate CMSIS MPU-related macros
Duplicate the CMSIS MPU-related macro definitions specifically
for Beetle SOC which is is not compliant with ARM CMSIS and
does not include the ARM CMSIS headers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos
1547abb57d arch: arm: use CMSIS defines for MPU_RASR register bit setting
This commit removes the macro definitions for MPU_RASR register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos
8d52c17166 arch: arm: use CMSIS defines for MPU_RBAR register bit setting
This commit removes the macro definitions for MPU_RBAR register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos
0a41e23ac0 arch: arm: use CMSIS macro defines for MPU_CTRL register bit setting
This commit removes the macro definitions for MPU_CTRL register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Jakub Rzeszutko
eb84eff27f arch: arm: nrf: modification of config parameter: SOC_SERIES_NRF52X
Configuration parameter SOC_SERIES_NRF52X is common for all NRF5X SoCs.
Due to that it cannot select: CPU_HAS_FPU because not all Nordic
microcontrollers supports that. Selection of this parameter was moved
to configuration of each SoC in Kconfig.soc file.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-06-19 20:02:51 +02:00