Commit Graph

7441 Commits

Author SHA1 Message Date
Henrik Brix Andersen
05da68c7cb drivers: sensor: shell: allow passing channel as number
Allow passing the channel as a number instead of a string in order to
support sensor-specific channels (channel SENSOR_CHAN_PRIV_START and
up).

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-15 12:59:20 -05:00
Jukka Rissanen
fc713d1f6b drivers: eth: e1000: Enable VLAN support
Enable VLAN support so that this driver can be used to test
the VLAN when using qemu_x86 board.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-06-15 18:24:20 +03:00
Adam Porter
722a85aea2 drivers: wifi: remove dependency on NET_SOCKETS_POSIX_NAMES
This change removes references to raw POSIX types and functions,
allowing the drivers to build without NET_SOCKETS_POSIX_NAMES.

After this, the dependency between NET_SOCKETS_OFFLOAD and
NET_SOCKETS_POSIX_NAMES can be removed.

See issue #26033 for additional context

Signed-off-by: Adam Porter <porter.adam@gmail.com>
2020-06-15 16:59:36 +02:00
Michael Hope
18d3499dba drivers: usb: fix a buffer overflow in usb_sam0.c
The driver currently blindly copies all of the outgoing bytes into the
endpoint.  Instead, calculate the endpoint size and copy up to that
amount instead.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-15 16:56:05 +02:00
Michael Hope
fe35269d12 drivers: usb: handle a null output arg on SAM0
The output parameter `ret_bytes` is optional and may be NULL.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-15 16:55:52 +02:00
Vincent Wan
e7a85ddef9 drivers: entropy: add get_entropy_isr() for CC13x2/CC26x2
A non-blocking, isr-safe version of get_entropy() is necessary in order
to be called during boot time before POST_KERNEL initialization.
Otherwise a crash is seen as the existing get_entropy() implementation
uses k_sem and relies on interrupts.

Fixes #18629

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-06-15 16:53:39 +02:00
Flavio Ceolin
83d0c0a53e serial: uart_xlnx_ps: Fix duplicate initialization
The uart configuration was initializing two fields of an union.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-15 16:53:20 +02:00
Jose Alberto Meza
a1b6dd51d0 drivers: espi: Add support for KBC status operations
In some systems, eSPI host perform operations directly over KBC HW
status.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-06-15 16:52:53 +02:00
Flavio Ceolin
b0d1abac9c drivers: uart_mux: Add missing verfification handler
Add the verifcation handler for the syscall uart_mux_find.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-13 16:37:58 -04:00
Abhishek Shah
ecc1673b78 pcie: endpoint: Add iProc PCIe EP driver
iProc PCIe EP IP is present in Broadcom PCIe offload chips.
Add iProc PCIe EP driver to provide basic PCIe EP functionality.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah
3c2fa8cd51 pcie: endpoint: Introduce API to achieve PCIe data transfer
Introduce common API to achieve data transfer using memcpy
to/from outbound region of PCIe EP.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah
ca17315d7f pcie: endpoint: Add public APIs for PCIe endpoint driver
Add public APIs for PCIe endpoint driver:
- EP configuration space read/write
- Mapping/Unmapping of Host buffer and PCIe outbound region
- Raise interrupt to Host
These are minimal base APIs to make PCIe EP functional.

Also, add a Kconfig and an empty CMakeLists.txt for drivers to extend.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah
bee0fdea1e drivers: pcie: remove depends on X86
Remove depends on X86 for config PCIE,
Let the platforms select PCIE if they want to.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Hake Huang
999c59c1ec dma: add error check on peripheral to peripheral
add dma direction check for dma_sam0

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Hake Huang
10fc7a38cc dma: add EDMA MCUX support for RT and k6s
tested on mimxrt1060_evt
  MEMORY_NOCACHE is needed
test on frdmk64f
  special test slot need configure with
  CONFIG_DMA_TEST_SLOT_START

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Hake Huang
6bb555ce83 clock_control: add EDMA clock support
add clock rate for RT series from ipg
Kinetis does not need additional clock added

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Anas Nashif
2ca3473349 spelling: fix typo
Fix some random typos..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-12 11:53:41 -04:00
Peter Bigot
f2ac844cf7 drivers: flash: nrf_qspi_nor: optionally support write from NVMC
The Nordic QSPI peripheral uses DMA transfers so data to write must be
located in SRAM.  Add a Kconfig that enables copying data from NVMC to
a stack SRAM buffer so it can be written to flash.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Peter Bigot
16573923b3 drivers: flash: nrf_qspi_nor: support write of sub-word lengths
mcumgr and possibly mcuboot write single byte values to update the
state of objects.  Rather than fail to do the write of values too
short for this peripheral detect the situation and write from a stack
buffer that meets the length criteria.

Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Marcin Niestroj
5bf4ee4f6c drivers: flash: nrf_qspi_nor: support specifying only 2 io-pins
Currently user is forced to configure an array of 4 IO pins. This makes
no sense when there are only 2 IO pins connected on board.

Configure 3rd and 4th pin in internal structure as
NRF_QSPI_PIN_NOT_CONNECTED if only 2 were specified in device-tree.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-12 11:11:30 +02:00
Ilya Tagunov
b899bbf9b9 soc: stm32l1: Enable DAC support
Enable STM32 DAC driver for STM32L1 series.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2020-06-12 11:06:44 +02:00
Aurelien Jarno
6c798aa31c drivers: lora: sx1276: make GPIO CS pin optional
The cs-gpios pin on SPI controller is optional for SPI controllers that
can automatically control CS line.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2020-06-12 11:06:26 +02:00
Maureen Helm
c603aa8928 drivers: serial: Fix uart_irq_tx_complete() in remaining mcux drivers
Extends the fix in commit 2175675199 to
all other mcux serial drivers. They were incorrectly checking if the
transmit buffer was empty when they should have been checking if the
transmission is complete.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-06-12 09:49:42 +02:00
Robert Lubos
041252b764 drivers: serial: nrfx_uart: Fix s32_t usage
s32_t was used instead of int32_t after the type transition in Zephyr.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-06-11 13:20:17 -05:00
Andreas Sandberg
aec341e677 boards: arm: b_l072z_lrwan1: Enable the USB controller
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.

Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 13:11:59 -05:00
Andreas Sandberg
a36147c9cb drivers: lora: Factor out sx12xx common functionality
LoRa radios supported by LoRaMAC-Node have a lot of common
functionality. Zephyr's LoRa implementation for the SX1276 uses
LoRaMAC-Nodes Radio HAL to implement API functionality like send and
recv. The exact same functionality will be used by the SX126x
driver. Facilitate sharing by moving that to a separate source file.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 07:15:34 -04:00
Andreas Sandberg
69fac5c498 drivers: lora: Move board support to a separate file
The implementation of the board support routines is shared between all
LoRa drivers that use LoRaMAC-Node. Move them from the SX1276
implementation to a separate source file to facilitate reuse. Make
this source file conditional on CONFIG_HAS_SEMTECH_RADIO_DRIVERS since
it will be used by all LoRaMAC-Node-based drivers.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 07:15:34 -04:00
Andy Liu
2175675199 drivers: serial: Fix "mcux_lpuart_irq_tx_complete" returns wrong result
Use "kLPUART_TransmissionCompleteFlag" instead of
"kLPUART_TxDataRegEmptyFlag" to check if the tx transmition is finished.

The "kLPUART_TxDataRegEmptyFlag" would give a wrong result
even if the transmition isn't over.

Signed-off-by: Andy Liu <andy@madmachine.io>
2020-06-11 11:00:53 +02:00
Dimitris Tassopoulos
c2e9c1fa49 boards: nucleo_f401re: added pwm-led0
Added onboard led to the devicetree to be supported also with pwm-led0

Signed-off-by: Dimitris Tassopoulos <dimtass@gmail.com>
2020-06-11 10:58:58 +02:00
Maureen Helm
3dd3c6a393 drivers: i2c: Check non-null pointer before dereferencing in i2c shell
Fixes the i2c shell to check the device name pointer is non-null before
dereferencing it.

Coverity CID: 210558

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-06-10 18:33:42 -04:00
Lukasz Majewski
43427c4d49 clk: eth: Add ETH_MCUX_RMII_EXT_CLK option to enable external RMII clock
This option will configure MCUX block (by setting RMIISRC [19] bit to 1
in SIM_SOPT2 register) to use external clock source for RMII from
ENET_1588_CLKIN).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-06-10 13:02:22 -05:00
Francois Ramu
0856e99155 drivers: timer: stm32 lptim stops counting on timeout FOREVER
When setting a timeout K_TICKS_FOREVER,the lptimer clock is stopped
(no reset of the lptim).
Then is the lptim possibly re-started when another source asks for.
The lptim clock must then be re-started and continue counting.
This is the case when wakeup from sleep mode, for example.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-06-10 09:33:40 -05:00
Krzysztof Chruscinski
1089b91ba2 drivers: gpio: nrf: Add mask to track GPIOTE usage
So far, register state was used to determine if GPIOTE channel is busy.
This leads to issues if channel is used in more customized way after
allocation. In particular, if it temporarly disabled since disabled
channel is treated as available and can be allocated to another user.

Added additional mask which tracks allocated channels. After allocation
user can reconfigure the channel.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-10 11:57:45 +02:00
Francois Ramu
732df68fff drivers: counter: rtc for stm32f2 soc series
This patch set the EXTI line 17 as the RTC alarm pin
on the stm32f2x serie from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-06-10 09:40:21 +02:00
Adam Porter
9da0f2af31 drivers: modem: use zsock_ variants of socket API
By using the Zephyr-native zsock_ family of types and functions, these
drivers will be decoupled from NET_SOCKETS_POSIX_NAMES.

Signed-off-by: Adam Porter <porter.adam@gmail.com>
2020-06-10 09:27:51 +03:00
Krzysztof Chruscinski
43cad10f73 drivers: serial: nrf: Remove flow control configuration from kconfig
Removed flow control configuration from Kconfig and updated samples
to use device tree for that.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Krzysztof Chruscinski
176d2d9f85 drivers: serial: nrfx_uarte: Use hw-flow-control from device tree
Cleaned up flow control configuration. Added support for using only
cts or only rts.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Krzysztof Chruscinski
f86e61be93 drivers: serial: nrfx_uart: Use hw-flow-control from device tree
Cleaned up flow control configuration. Added support for using only
cts or only rts.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Michael Hope
d0f87fa9d8 drivers: flash: report if the read returns an error
This matches the other commands that log on error.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-09 18:57:54 +02:00
Peter Bigot
204612b3b2 drivers: flash: at45: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot
c11ef527b1 drivers: flash: nrf_qspi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot
f6cfdf79ba drivers: flash: spi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Andreas Sandberg
19c165a119 drivers: entropy: stm32: Add support for STM32L0 SoCs
Add the necessary clock configuration to support STM32L-based
SoCs. This change likely adds support for other STM32 SoCs as well
since the HSI48 clock is configured for all SoCs that support it
(except the STM32L4x) instead of just the STM32G4X.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-09 14:44:25 +02:00
Andreas Sandberg
f1d80b3f02 drivers: clock_control: stm32: Enable SYSCFG on STM32L0
The entropy driver needs to use the SYSCFG block to control VREF on
the STM32L0. Clock the block if the entropy driver has been enabled.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-09 14:44:25 +02:00
Aurelien Jarno
e4b62a8ce2 drivers: timer: lptim: depend on SYS_POWER_MANAGEMENT
The LPTIM driver is supposed to be only available when the SoC is
allowed to enter power sleep mode, as described in commit f30f5fff72
("drivers: timer: lptim is [EXPERIMENTAL] for stm32 soc series only").

For that it should depends on SYS_POWER_MANAGEMENT (which gates the
SYS_POWER_SLEEP_STATES and SYS_POWER_DEEP_SLEEP_STATES options) instead
of DEVICE_POWER_MANAGEMENT.

Fixes #25989

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2020-06-09 08:15:56 -04:00
Hubert Miś
7f66fd84e8 drivers: ieee802154: fix nrf5 initialization with external irq source
MPSL is a library that provides external radio IRQ source for the
802.15.4 driver. If this library is in use, the driver shall not
configure the radio IRQ.

Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2020-06-09 13:46:39 +02:00
Markus Becker
f253096a9c net: ieee802154: Align thread names of radio drivers
The NRF5 and RF2XX drivers are using different thread names compared
to the other 802.15.4 drivers. Aligned the thread names to <chip>_rx.

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-06-09 11:38:25 +02:00
Henrik Brix Andersen
0cf9be32c9 drivers: adc: lmp90xxx: set thread name
Set the thread name for the data acquisition thread in the TI LMP90xxx
ADC driver to aid in debugging and profiling.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-09 10:54:21 +02:00
Peter Bigot
bc34501892 drivers: use macro to define device structures
Replace individual device instance definitions with the macro that
expands to the equivalent change.

    F='struct device DEVICE_NAME_GET'
    git grep -l "$F" \
     | xargs sed -i -r \
       -e "s@$F"'\(([^)]*)\);@DEVICE_DECLARE(\1);@'

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-08 15:01:52 -04:00
Markus Becker
2115b575a4 net: ieee802154: Allow to disable auto-start of 802.15.4 interfaces
Some radio drivers need configuration before start-up. Up to now only
the RF2XX drivers allowed this, but other radio drivers need this as
well. In particular for setting EUI64 addresses.

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-06-08 19:55:19 +03:00