Commit Graph

370 Commits

Author SHA1 Message Date
Andrew Boie
1c97851726 x86: enable MMU on 64-bit with SMP
The races are believed to be resolved with the patch to
irq_offload(). Allow the MMU to be turned on and enable
it for qemu_x86_64.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-08 15:16:43 -08:00
Ulf Magnusson
bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson
975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Andrew Boie
a41c0d2bf9 qemu_x86_long: enable early console
Useful for debugging.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-15 09:00:49 -07:00
Charles E. Youse
3eb1a8b59a arch/x86: (Intel64) implement SMP support
Add duplicate per-CPU data structures (x86_cpuboot, tss, stacks, etc.)
for up to 4 total CPUs, add code in locore and z_arch_start_cpu().

The test board, qemu_x86_long, now defaults to 2 CPUs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
Charles E. Youse
8d97750eef arch/x86: (Intel64) add z_arch_curr_cpu() to enable CONFIG_SMP=y
And set qemu_x86_long board to build with CONFIG_SMP=y by default.
Apparently two benchmark tests - latency_measure and sys_kernel -
do not work with the SMP scheduler, so those tests are disabled.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
Charles E. Youse
200056df2f arch/x86: rename CONFIG_X86_MULTIBOOT and related to CONFIG_MULTIBOOT
Simple naming change, since MULTIBOOT is clear enough by itself and
"namespacing" it to X86 is unnecessary and/or inappropriate.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-29 12:30:34 -07:00
Charles E. Youse
1ffab8a5f2 arch/x86: rudimentary ACPI support
Implement a simple ACPI parser with enough functionality to
enumerate CPU cores and determine their local APIC IDs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-29 12:30:34 -07:00
Kamil Piszczek
a320010e4a boards: x86: qemu_x86: adding nvs capability
Added the NVS capability to the QEMU x86 board description.

Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
2019-09-27 10:06:40 -07:00
Charles E. Youse
e2a0eb0d1c boards/qemu_x86: remove stale flash reference from qemu_x86_long
The QEMU x86 .dts files were re-arranged before long mode was
merged. We don't need this reference to the flash region anymore.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-23 17:50:09 -07:00
Charles E. Youse
34120b9ee5 boards/x86/gpmrb: disable Multiboot header generation
We don't require this to boot with SBL, so disable for now.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse
3bc79fdf2c arch/x86: refactor APIC timer configuration to SoC level
The APIC is part of the SoC, not the board, so move the defaults down.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00
Charles E. Youse
af8df4f764 boards/x86/qemu_x86: remove stale reference to HPET_TIMER_IRQ
This config option is no longer present since HPET moved to DT.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-18 00:29:18 +08:00
Charles E. Youse
3038209695 drivers/timer/hpet.c: migrate to devicetree
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.

Fixes: #18657

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-17 22:37:09 +08:00
Charles E. Youse
640c5a5e95 boards/x86: add Intel64 (64-bit long-mode) QEMU target board
Add qemu_x86_long board (with CONFIG_X86_LONGMODE=y) for testing.

This requires adding support to soc/ia32 for long mode (trivial),
and adding a quick 64- to 32-bit ELF conversion before invoking
QEMU, which apparently doesn't like 64-bit kernel files.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Erwan Gouriou
e5380258b6 dts/Kconfig: Remove unused HAS_DTS_ETHERNET
Symbol not used clean it up.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-09-12 08:16:42 -05:00
Charles E. Youse
ee525c2597 arch/x86: inline x2APIC EOI
From the Jailhouse days, this has been a function call. That's silly.
We now inline the EOI in the ISR when in x2APIC mode. Also clean up
z_irq_controller_eoi(), so it now uses the inline macros.

Also, we now enable x2APIC on up_squared by default.

Fixes: #17133

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-12 09:53:45 +08:00
Andrew Boie
9df9994572 x86: fix XIP SOC support and defaults
XIP support in x86 was something of a mess. This
patch does the following:

- Generic ia32 SOC no longer defines a "flash" region
  as generic X86 devices don't have a microcontroller-
  like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
  The board definition must provide a flash region definition
  that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
  linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
  no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
  removed.
- qemu_x86 has a fake flash region added, immediately after system
  RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
  However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
  XIP by default, plus an additional test to exercise XIP on
  qemu_x86 (which supports it but has XIP switched off by default)

The overall effect of this patch is to:

- Remove XIP configuration for SOC/boards where it does not make
  any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
  it off by default for other tests, to ensure it doesn't bit-rot
  and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.

Fixes: #18956

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-11 21:11:38 -04:00
Kamil Piszczek
16d45a8a14 boards: qemu_x86: adding missing flash definitions
Added missing flash definitions.

Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
2019-09-08 12:35:15 +02:00
Charles E. Youse
6767563f94 arch/x86: remove support for IAMCU ABI
This ABI is no longer required by any targets and is deprecated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-07 10:07:42 -04:00
Charles E. Youse
c02288b245 docs: fix errors/ambiguities in docs for Apollo Lake boards
The documentation for the GPMRB incorrectly made reference to the
up_squared board in its high-speed UART configuration section. We
consolidate the related documentation for all boards based on the
Apollo Lake SoC and adjust the language to be more generic.

Fixes: #18808

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-04 10:02:25 +02:00
David B. Kinder
60136f00cb doc: add how to exit from QEMU in samples
While trying out the hello_world sample built for QEMU, I was expecting
the sample app to exit and I'd return to a command prompt.  Nope.  You
need to exit QEMU manually, so add that step to the sample instructions.
Looking around, there are more uses of QEMU like this that could use
this added step after running the sample app.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-09-02 12:06:08 -04:00
Carles Cufi
afcbc9992c doc: Use west everywhere to build and flash
Instead of having a mix of west and CMake/ninja instructions for
building and flashing, document it using only west. This will help
clarify that west is the default build tool in Zephyr and should also
reduce confusion over what tool to use.
Note that the biggest change is changing the default in
doc/extensions/zephyr/application.py for :tool:, from all to west.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-08-27 19:36:24 +02:00
Andrew Boie
ce3cc4f974 x86: ia32: do not use the first megabyte
After witnessing some strange errors with memory not being
what it should be, lifiting everything above 1MB has solved
it. The Zephyr binary was being loaded into memory containing
reserved regions, resulting in data corruption.

We still simulate XIP for testing purposes by setting up the
memory map as follows:

0x000000 - 0x0FFFFF : Non-present
0x100000 - 0x4FFFFF : "Flash" ROM region
0x500000 - 0x8FFFFF : "SRAM" RAM region

For a total of 9 megabytes of physical RAM used.

Fixes problems observed in some large tests when code coverage
is enabled (which increases the amount of RAM used even more).

Fixes: #17782

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-07 12:50:53 -07:00
Andrew Boie
c3b3aafaec x86: generate page tables at runtime
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.

For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.

The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-07 12:50:53 -07:00
Andrew Boie
bd709c7322 x86: support very early printk() if desired
Adapted from similar code in the x86_64 port.
Useful when debugging boot problems on actual x86
hardware if a JTAG isn't handy or feasible.

Turn this on for qemu_x86.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-02 00:29:21 -07:00
Anas Nashif
da6b49b432 doc: minnowboard: add grub docs
Was previously documented as part of the galileo board. Moving here now.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Anas Nashif
578ae40761 boards: remove quarl_se_c1000
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Anas Nashif
ffaba63b10 boards: remove arduino 101 and related boards
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Anas Nashif
a597c86c30 boards: remove galileo board
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-29 21:30:25 -07:00
Jukka Rissanen
5cf60a326a boards: Set support for serial port networking as netif:serial-net
As we now have PPP support, use more generic "serial-net" string instead
of "slip" when setting what kind of networking the board supports.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Peter A. Bigot
1bb59bb68e dts: add label property to all jedec,spi-nor nodes
The property is required on all SPI clients, but was missing from
several devicetree nodes.  Set it, using the capitalized version of the
node alias when present, with "jedec,spi-nor#0" as the fallback.

Closes #17662

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-07-20 17:23:08 -04:00
Andrzej Puzdrowski
5a3f106be3 boards/qemu_x86: fix emulated program memory size
Qemu_x86 didn't reflect emulated program memory size.
It was because chosen zephyr,flash was assigned to flash_simulator
which was helping to generate DT_FLASH properties for sim_flash node.

This change revert choice of flash0 which solve problem with
program memory size. Flash simulator have to use
DT_SOC_NV_FLASH_xxx labels for fetch its property since that.

fixes #15832

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-07-17 13:49:26 -07:00
Andrzej Puzdrowski
cdc7b6d656 boards/qemu_x86: fix qemu memory map
The desired memory map is to have the 0 - 4K page non-present
to catch NULL pointer dereferences,
from 4K - 4MB for the program text (RO, Execute),
ROM (RO, No Execute), and 4MB-8MB for system RAM.

This patch cut text size by 4 KB which allow to meet above
requirements.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-07-17 13:49:26 -07:00
Anas Nashif
d1b2718687 cleanup: include/: move uart.h to drivers/uart.h
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5843884887 cleanup: include/: move pwm.h to drivers/pwm.h
move pwm.h to drivers/pwm.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
a8167ab17d cleanup: include/: move pinmux.h to drivers/pinmux.h
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
8f692c7d38 cleanup: include/: move i2c.h to drivers/i2c.h
move i2c.h to drivers/i2c.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
6aa9c3a68f cleanup: include/: move gpio.h to drivers/gpio.h
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
ef281c4237 cleanup: include/: move sys_io.h to sys/sys_io.h
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Charles E. Youse
c5e582038c boards/x86/up_squared: default to new local APIC timer
This is the "flagship" platform for the new local APIC timer driver.
The opportunity is taken clean up the configuration as well, so the
choice of local APIC vs HPET timer requires changing only one Kconfig.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-27 07:20:54 -04:00
Charles E. Youse
ca4910827b boards/x86/quark_d2000_crb: drop support for Quark D2000 dev board
Remove the board directory as well as references in tests and samples.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
David B. Kinder
6b2cd29223 doc: fix misspellings in documentation
Fix misspellings and doc issues missed during regular reviews (including
some files without a trailing newline)

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-06-18 15:08:19 -04:00
George Dima
955cac617d boards: galileo: Fix PINMUX_FUNC_D for io_pin 9.
Modified PINMUX_FUNC_C (which appears twice in a row for io_pin 9) with
PINMUX_FUNC_D.

Signed-off-by: George Dima <dima331453@gmail.com>
2019-06-18 12:39:03 -04:00
Ulf Magnusson
a84ded74ea dts: Replace status = "ok" with status = "okay"
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.

The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.

The replacement was done with

    git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-06-14 19:51:13 -05:00
Kumar Gala
a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Charles E. Youse
15223dd936 arch/x86/Kconfig: remove CONFIG_IA32_LEGACY_IO_PORTS
Hygiene. This option is never referenced by any code.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-14 05:49:13 -04:00
Charles E. Youse
f3611fdd0c boards/x86_jailhouse: remove support for Jailhouse hypervisor
This configuration is not used, maintained or tested, so it is removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00
Charles E. Youse
0fe4e1b3a8 arch/x86: x2APIC support is not specific to jailhouse
Simple renaming and Kconfig reorganization. Choice of local APIC
access method isn't specific to the Jailhouse hypervisor.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00