As part of the prep to support the M0+ core on lpcxpresso54114, we
rename the lpcxpresso54114 board port to lpcxpresso54114_m4 to be
explicit.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename various SoC related defines and files from just being LPC54114
to LPC54114_M4. This is in prep for supporting a build for the second
core on the LPC54114 (the Cortex-M0+).
* Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4
* Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4
* Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi
* Moved some pinmux related defines into SoC code.
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use DT to generate defines for irq and reset gpios in bluetooth
controller node.
Define a bt alias to allow generation of defines with friendly
names.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
* add pmod mux init to config the pmode interfaces
to the specific functions
* without pmod mux init, all pmod interfaces will be
GPIO, no interfaces for spi/i2c0/i2c1/uart0
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
in dts folder
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
* em9d is configured to use ccm, and no sram
* choose dccm as virtual sram to generate the correct definitions
of CONFIG_SRAM_XXX which are used in many places, e.g. lib-hooks.c.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The zephyr.exe created when building a native POSIX application can take
some parameters that are documented in the "board" document, so add a
reference to that documentation here.
fixes: #6384
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
patch removes Kconfig defines for RAM and ROM size in x86. Instead
these values are derived from dts.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Adds dts bindings for the mcr20a wireless transceiver. The frdm_k64f
board supports the mcr20a via an Arduino shield, therefore the dts node
is added to the board dts. The kw2xd is a SiP and thus the mcr20a dts
node is added to the soc dts.
The networking samples using prj_frdm_k64f_mcr20a.conf have been broken
since the refactoring of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configures the frdm_kw41z board to mux spi signals on pins PTC16-19.
Updates the board document to reflect that spi is supported on these
pins.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxas21002 interrupt pins to all boards that
have this sensor.
The fxas21002 driver is currently only aware of one sensor interrupt
pin, therefore the routing of INT1 or INT2 to the driver is handled in
each board's dts.fixup.
The fxas21002 sample application has been broken since the refactoring
of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxos8700 interrupt pins to all boards that
have this sensor. The frdm_k64f and hexiwear_k64 connect both sensor
interrupt pins to the mcu, but the frdm_kw41z connects only one.
The fxos8700 driver is currently only aware of one sensor interrupt pin,
therefore the routing of INT1 or INT2 to the driver is handled in each
board's dts.fixup.
The fxos8700 sample application has been broken since the refactoring of
the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add cs, irq and reset gpios description in spbtle controller
node and use generated defines instead of Kconfig symbols.
Define a bt alias to allow generation of defines with friendly
names.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Indexed defines were systematically generated even when there
was only one element to generate.
So we ended up generated a lot of _0 defines.
Then we needed to generate aliases to these _0 indexed defines,
in order to get useful defines.
For instance:
#define GPIO_LEDS_0_GPIO_FLAGS_0 4
#define GPIO_LEDS_0_GPIO_PIN_0 5
#define GPIO_LEDS_0_GPIO_FLAGS GPIO_LEDS_0_GPIO_FLAGS_0
#define GPIO_LEDS_0_GPIO_PIN GPIO_LEDS_0_GPIO_PIN_0
This commit allows to generate _0 indexed define only if a
property has more than one elements to define.
Aliases generation to _0 indexed defines are also removed.
Note: IRQ are left untouched since this is frequent to handle
multiple IRQs in a driver
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The disco_l475_iot1 board uses the vl53l0x sensor in XSHUT pin
master control configuration mode. So, it has to explicitly
enable it now.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adds a board-level config option to select whether the code gets linked
into internal instruction tightly coupled memory (ITCM), external
hyperflash, or external qspi flash. The default is ITCM.
Note that we are not yet building an image vector table (IVT) into the
image, therefore the zephyr binary is not bootable by the SoC ROM as-is.
However, the DAPLink firmware prepends an IVT to the image when you use
its drag-and-drop feature to program flash, and this results in a
bootable zephyr application.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds flexspi and semc memory controllers to the i.MX RT SoC. Adds
hyperflash, qspi, and sdram external memories to the mimxrt1050_evk
board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Previously, when !CONFI_XIP, BOOTLOADER_SRAM_SIZE was defaulted
to 16 (K), reducing the size of SRAM available for the program.
Also, though it has no effect, the value for SRAM start in the
dtsi file was incorrect.
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The frdm_k64f board document incorrectly listed spi signals on PTCD
pins, which don't exist. They should be on PTD pins.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Until now, Zephyr has used a patched Kconfiglib that turns 'source' into
a globbing source (by replacing 'source' with 'gsource' at the token
level). There's two problems with this:
- The patch needs to be maintained separately
- Misspelled filenames are silently ignored, as they look like glob
patterns that don't match anything
Fix it as follows:
1. Replace all 'source' statements that use wildcards with 'gsource'
2. Remove the custom Kconfiglib patch so that 'source' no longer globs
The sed pattern '/source.*[*?]/s/source/gsource/' was run over all
Kconfig* files to do the replacement.
source's that use environment variables that might contain glob patterns
were manually changed to gsource.
Building the docs in doc/ is a good test, as doc/Makefile deliberately
sets the environment variables to glob up as many Kconfig files as
possible.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
This patch adds DT description of generic storage flash
partition. This fixes issue #7227.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
FS_FLASH_MAP_STORAGE keyword enables the storage partition,
but it was depend on flash_map module which is unused by
NFFS. This patch makes it independent thanks
to it is possible to enable the storage partition
without flash_map module.
FS_FLASH_MAP_STORAGE was renamed to
CONFIG_FS_FLASH_STORAGE_PARTITION
as it is independent for flash_map.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add support to enable test application selectively based
on defconfig
Change-Id: I8111750ff099edd95ffa22c6e312999c801678ea
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
A brief description about intel_s1000 and ways to connect,
flash, debug etc.
Change-Id: I459c64d8d9574bc3511da7f983d68e044cacc1d0
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable the CAVS I2S on intel_s1000. Also, introduce a test to
validate I2S in ping-pong and normal modes.
Change-Id: Iea78e22cedc7724c1c2e821c68d7030cc0a65047
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable the CAVS DMA on intel_s1000. Also, introduce a test to
validate the DMA.
Change-Id: I2ff233c45cfd8aea55e254d905350a666aa649a0
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patchset creates Debug, Debugserver and Flash scripts
ensuring support in the ZephyrBinaryRunner mode.
Change-Id: Ib4f7820b1c6a045bd67cf4a031be99cf61e65eca
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
intel_s1000 has multiple levels of interrupts consisting of core, CAVS
Logic and designware interrupt controller. This patchset modifies
the regular gen_isr mechanism to support these multiple levels.
Change-Id: I0450666d4e601dfbc8cadc9c9d8100afb61a214c
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
