Commit Graph

26 Commits

Author SHA1 Message Date
Benjamin Walsh
ee659ae1a1 build: add _ASMLANGUAGE to all asm files
This avoids asm files from having to explicitly define the _ASMLANGUAGE
symbol themselves.

Change-Id: I71f5a169f75d7443a58a0365a41c55b20dae3029
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-24 13:34:51 +00:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Andrew Boie
452fd7a5c2 x86: don't set segment registers if we don't set GDT
We have no idea what's in the GDT if we don't set it ourself.

Change-Id: I3c2e406370e3ea149252c423d66c97aab95bee17
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-29 14:51:57 -08:00
Andrew Boie
2ffa516d89 x86: set accessed bit in ROM-based GDT
Previous configuration was backwards. From the Intel manual:

"If the segment descriptors in the GDT or an LDT are placed in ROM,
the processor can enter an indefinite loop if software or the
processor attempts to update (write to) the ROM-based segment
descriptors. To prevent this problem, set the accessed bits
for all segment descriptors placed in a ROM. Also, remove
operating-system or executive code that attempts to modify
segment descriptors located in ROM."

Only by some miracle has this not been causing problems.

Change-Id: I0bb915962a1069876d2486473760112102feae7b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-19 00:57:04 +00:00
Ramesh Thomas
a3dc53f2a6 power_mgmt: Do not notify deep sleep if bootloader does context restore
Some bootloaders have power management support to restoer context
upon resume from deep sleep. In such cases, the OS startup code
should call the notification hook. Create Kconfig flags to configure
this option.

Jira: 1257
Change-Id: I9f40c5fa077c2f17dc8e9f11604c3ed17e549ed5
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-11 20:40:53 +00:00
Ramesh Thomas
c0cd7acf34 power_mgmt: Simplify _sys_soc_resume notification
_sys_soc_resume hook is over loaded to handle to different
scenarios. It is primarily called to notify exit of kernel idling
after PM operations. It is also used to notify exit from deep sleep.
This is very confusing and also makes the implementation of the
hook function very difficult because of very different conditions
involved in the 2 different use cases. Further, users may not require
either or both use cases depending of their custom boot flow and
power state handling. To simplify, create a separate hook for the
purpose of deep sleep exit notification. Use the existing one to
only notify kernel idling exit after PM operations.

Jira: ZEP-1256
Change-Id: I96350199a0fd37f16590c8ee5302a94a3d71b8ba
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-11 20:40:52 +00:00
Andrew Boie
99368c7435 x86: optimize GDT space
The CPU manual indicates that 8-byte alignment is sufficient,
not sure why gdt_rom was aligned on a 16-byte boundary.

The null descriptor in the GDT is never looked at by the CPU,
save a few bytes by putting the 6-byte pseudo descriptor there.

Change-Id: I73f26cdeb30a91f8258c88ef960a45812a11d959
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-20 20:47:15 +00:00
Andrew Boie
eb53ebb885 x86: fix CONFIG_INIT_STACKS
The interrupt stack wasn't being initialized at boot.

Change-Id: Iec3e770d385643415641e15906c3a53f7c74a2e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-21 15:04:55 +00:00
Andrew Boie
0a86fcbb2a x86: assume irq stack pointer and size already aligned
This is now done in nano_init.c

Change-Id: I2717ca54fd5e16b18c2dc506bc3972caf23f26d8
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-21 14:26:30 +00:00
Andre Guedes
ebded004b9 x86: crt0: Remove 'je copyDataDone' from CONFIG_XIP block
When CONFIG_SYS_POWER_DEEP_SLEEP is enabled, the _sys_soc_resume
function is called and the 'ZF' bit from EFLAGS register may be set
to 1. In that case, we end up wrongly jumping into 'copyDataDone'
label and no data is copied from ROM to RAM.

It seems this 'je' instruction is used without any previous comparison
operation which properly sets the ZF flag. Since 'ZF' initial value is
0, we never jump into 'copyDataDone' label. Also, this 'je' instruction
doesn't seem to be really required since, if %ecx is zero, no data will
be copied anyway.

That being said, this patch removes the 'je' instruction since it fixes
the bug described in the first paragraph and it doesn't affect the rest
of the crt0 execution.

Also, removes outdated information about section size and alignment.

Change-Id: Ia062b78247c4059009193a53f879aa1ebe80881d
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-07-15 23:59:11 +00:00
Andre Guedes
813923e63c x86: crt0: Fix '_sys_soc_resume' type declaration
The '_sys_soc_resume' symbol is function-type not data-type as declared
in crt0.S. This patch fixes this by using GTEXT macro instead.

Change-Id: Ibe8bcf92ab045bfe908fd2048d046083e773894f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-07-13 17:59:25 +00:00
Andrew Boie
81f61bb1be x86: make GDT setup optional
For some security scenarios the GDT may already be setup and locked,
in which case the kernel trying to set it again could lead to problems.

Change-Id: I727c1d213479f46a4bb6f0c04a9096131e10b3e7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-26 19:32:03 +00:00
Ramesh Thomas
bb19e6f82f power_mgmt: Make names consistent with new RFC
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.

Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-03-26 14:35:11 -04:00
Ramesh Thomas
3888735e0d adv_power:Advanced Power Management APIs
This is part of an ongoing development of power management
support in zephyr. This implementation builds upon an existing
hook interface and adds more enhancements. This was tested
with reference implementations on quark_d2000 and quark_se.

Change-Id: I28092b7ec90ce1f1cc661cf99ca88708910c8eb2
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 11:20:32 -08:00
Ramesh Thomas
72e248b11b adv_power:Rename PM functions according to coding convention
Renamed functions and labels used in power management code
according to coding convention.  Only doing this to relevant
functions and not touching functions that will be removed in
future patches.

The stack used during resume would be necessary so
renamed that too.

Change-Id: I2f09a349b0f0fd6520c11b4cd73f4c8e1a13f100
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 10:57:51 -08:00
Ramesh Thomas
c1a2523445 adv_power:Fix build error when ADVANCED_IDLE flag is enabled
GlobalTss is not defined anywhere. This was originally designed
to be used by power management code to switch thread context to
kernel resume location. An alternative to this method would be
implemented.

Change-Id: I9ae14ba14f9573d8bd8579869cdee9cf85a5684a
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 10:57:51 -08:00
Andrew Boie
f0a1d22f28 x86: leave the GDT in ROM by default
We don't normally need a runtime-mutable GDT; make it optional to
activate a second copy in RAM. Regardless of whether it is in RAM
or ROM, it can be accessed by the '_gdt' symbol.

Change-Id: I5ce955f4b8875eb60040917ceaacc07d7e5941ac
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:28 -05:00
Andrew Boie
689ec02211 x86: mvic: fix IDT reload
The argument to 'lidt' is a chunk of memory with the base address
and limit of the IDT, and not the IDT itself. Horrible things
were happening when the IDT itself was being passed to this
instruction.

To be extra safe, disable interrupts while we modify the table
and subsequently reload it.

Change-Id: I9bf96f13a5f6e1be80d11bbfb9db3df1f2ed613a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:06 -05:00
Anas Nashif
275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Allan Stephens
7011b1c8da x86: Undo workaround required by Diab toolchain
This workaround is no longer required.

Change-Id: I797237be77b7568fe836df0e82640027d8d4882b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:32 -05:00
Javier B Perez Hernandez
f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Dirk Brandewie
c55c858ffc x86: remove obsolete option PROT_MODE_SWITCH
Zephyr requires that the processor be in 32 bit protected mode on
entry.

Change-Id: I71792eeb154281881e8516a7a8a2291a52f83fc6
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:24:20 -05:00
Dirk Brandewie
3012166000 x86: remove legacy BOOT_A20_ENABLE option
BOOT_A20_ENABLE relies on the kernel being on a system that has a full
PC BIOS and requires that the A20 line be enabled to boot
correctly. None of the supported platforms satisfy either requirment.

Change-Id: I05805a050f5531de0348b60a4f0cb974e464b279
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:24:20 -05:00
Benjamin Walsh
0dcad8331b clarify use of term 'context'
The term 'context' is vague and overloaded. Its usage for 'an execution
context' is now referred as such, in both comments and some APIs' names.
When the execution context can only be a fiber or a task (i.e. not an
ISR), it is referred to as a 'thread', again in comments and everywhere
in the code.

APIs that had their names changed:

  - nano_context_id_t is now nano_thread_id_t
  - context_self_get() is now sys_thread_self_get()
  - context_type_get() is now sys_execution_context_type_get()
  - context_custom_data_set/get() are now
    sys_thread_custom_data_set/get()

The 'context' prefix namespace does not have to be reserved by the
kernel anymore.

The Context Control Structure (CCS) data structure is now the Thread
Control Structure (TCS):

  - struct ccs is now struct tcs
  - tCCS is now tTCS

Change-Id: I7526a76c5b01e7c86333078e2d2e77c9feef5364
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Peter Mitsis
ed610c5bd5 x86: Replace references to BSP with platform
Removes references to obsolete BSP terminology.  Where appropriate, replaces it
with platform terminology.

Change-Id: I41fc099844d137dd0ea87cce0f675dc6f022ad40
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:43 -05:00
Peter Mitsis
96726f0a58 x86: Move source files from arch/x86/ to arch/x86/core/
Moves the source files from arch/x86/ to arch/x86/core/ as part of transforming
BSPs to platforms.

Change-Id: I0ef6622762cda8ce201944fd87f2ee8f73e3e511
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:41 -05:00