Support for the NUCLEO-L031K6 development board with STM32L031K6 SoC.
Although the SoC only contains 32k flash and 8K RAM, it has been tested
on a number of samples and has worked as expected.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
Fixes: #28462
This commit allows shields to be defined in other BOARD_ROOTs, either
using `-DBOARD_ROOT=<path>` or a Zephyr module defined BOARD_ROOT.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This is done to facilitate multi image build systems
where child images could be associated with a different
core than the parent image.
In such situations, the name of the board associated with
the core of the child image must be known.
Boards for the 'CPUNET' domain is already in place.
This commit adds the boards for the 'CPUAPP' domain.
These would be needed if the parent image is build in the
'CPUNET' domain, and the child image is in the 'CPUAPP'
domain.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
For the application core, the `--device` parameter specifies only
the generic `cortex-m33`, so it is impossible for the debugger to
flash the target.
For the network core, the `--device` parameter is not present at all,
so it is even impossible to run the `debug` command.
This commit fixes the above issues by specifying the proper devices.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update nsim board documentation:
* add info about run on HW (HAPS)
* update info about dependencies in case of single / multi core
runs in simulation and run on HW
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
ARC nSIM boards (starting with nsim_ prefix) allow to run
Zephyr in simulator and on real hardware.
Allow to run Zephyr on HW by enabling mdb-hw runner.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
mdb runner is quite special as it can be used to run Zephyr on
both simulator (nSIM) and real hardware.
However it is really misleading as same command (west flash)
will run Zephyr in simulation for one board and try to run it
on HW for another board. Things are getting worse for boards
supporting both runs in simulation and on real hardware.
Let's split mdb runner for mdb-hw (for runs on HW) and mdb-nsim
(for runs in simulation) runners.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Move i2c to defconfig
Add documentation
Improve dts
Remove unnecessary option and only use the default ones.
Provide a default Active state directly in the device tree
Fix copyright
Signed-off-by: Stephane Dorre <stephane.dorre@gmail.com>
Disable setting CONFIG_SOC_FAMILY_NRF manually
Limit SPI frequency to 8MHz
configure new st7789v in device tree
Signed-off-by: Sergey Koziakov <dya.eshshmai@gmail.com>
Basic sample program that uses the one led and button from the Pinetime.
Led will turn on everytime the button is pushed.
Signed-off-by: Rafa Couto <caligari@treboada.net>
align kconfig option CONFIG_ARC_CUSTOM_INIT to
CONFIG_INIT_ARCH_HW_AT_BOOT. Remove unused CONFIG_ARC_CUSTOM_INIT in
kconfig.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
Add support for the BuyDisplay 3.5" TFT + touch shield based on ILI9488
controller and FT6236 touch.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Make driver generic for multiple ILI displays. The adopted strategy is
to share all driver code except register initialization, which has been
found to have some specific registers/values depending on the
controller.
The driver has been adjusted to support multiple compatibles.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
UART IP is clocked with 50MHz on HAPS by default. So switch
UART clock-frequency from 100MHz to 50MHz for nsim_* boards
so the binaries can be run on HAPS as well.
This property is dummy in case run in simulator (nSIM) so we
don't need to change anything in nSIM configuration files.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the board image file in the nrf5340 documentation,
reflecting the fact that we now document the nRF5340 DK
instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Update the docs of nRF5340 board, to point to the
nRF5340 DK instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Move the data/command GPIO from Arduino header 16 (D10), which collides
with Arduino SPI SS, to Arduino header 15 (D9).
Add commented example for specifying a reset GPIO on Arduino header 14
(D8).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We deprecate nRF5340 PDK and add a note that
the board will be replaced by nRF5340 DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Nordic Dev Kit board names were changed in Zephyr
v2.3 release, following the standard Board deprecation
policy. Two releases later we do not need to keep
references to the old names in the boards' documentation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This build target has all the low-memory options enabled for
memory management: a 4MB address space, 32-bit paging mode,
no KPTI, an empty page pool, and common page tables for
memory domains.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These are set such that we have enough pages in the pool
for typical driver mappings and to instantiate two more
memory domains, which is what our tests require.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Add support for the recently introduced STM32CubeProgrammer runner.
Updated documentation to mention its availability as latest official
OpenOCD releases do not support H7 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
There is no user USB port available on these boards.
Remove support and remove files when no more needed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enables the fat_fs sample on the mm_swiftio board by adding a
board-specific Kconfig overlay, and adding sdhc to the list of
board-supported features.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Following migration of pinctrl configuration from pinmux.c files
to device tree and deprecation of pinctrl defines, remove
pinmux.c files when possible.
Additionally remove the CMakeLists.txt files when it makes sense.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add Inventek es-WIFI modules shield. This shield exposes es-WIFI driver
using Arduino Uno R3 header by UART or SPI interfaces. It shows how
user can create their own overlay and expose es-WIFI driver.
The current Inventek's EVB doesn't have all pins necessary to control
the module by Arduino hearder. This shows how to wire to get ISM43xx
EVB working.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Update documention to refer to MEC152x specifications and
SPI image generator. MEC152x is the actual production SOC.
The only difference is the Boot-ROM loader SPI image layout.
Preserve the link to the old, MEC1501 SPI image generator.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Move STM32 based board USB pin configuration to device tree.
Exceptions:
* olimex_stm32_h407: Node not enabled and not documented.
Signal added in disabled node.
* L0/G4 based boards as signals are not available yet.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This qemu device is REALLY slow in icount mode. When I run it outside
of icount and watch the simulator advance the clock device in real
time, it looks to me like it expects the counter to be running at ~125
MHz. But it's set to a 12 MHz clock rate in its config, and trying to
use a 1000 Hz tick rate.
At those settings (and with the shift=3 argument to icount), I'm
measuring about 10k cycles to handle a minimal timer interrupt. But
if you do the math, that comes to 12k cycles per tick. The interrupt
takes as long as a tick! That would never work, except for the fact
that the timer driver on this device cheats and doesn't try to align
to ticks (basically ignoring all the lost time). And even that breaks
on the scheduler_api test (which does both tick and cycle math and
tries to compare them) when it's fixed to properly align itself.
One solution might be to set the clock rate to what qemu appears to
believe is the correct 125 MHz value. And that causes the test to
complete, but all tests now take ~10 minutes of real time because the
simulator is so slow!
So just make up some clock rates, it's a simulated platform after all.
I chose 5 MHz cycle time and 100 Hz tick rate, which on my device is
about half of "real" speed and very acceptable.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Refactors nxp i.mx, kinetis, and lpc board-level device trees to use
DT_SIZE_K and DT_SIZE_M macros to define external memory sizes. This is
self documenting and easier to read.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
I2S signals should now be configured using dt.
For nucleo_f411re, I2S pins were configured using SPI definitions
that pulled the same strings behind the scene as I2S would have done.
This being said, only CK and SD pins should be needed and were
documented, so I only left those.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
