zephyr/arch
Peter Mitsis 4cc973986d arch: Update arch_is_in_isr() SMP implementations
Fixes a flaw in implementations of arch_is_in_isr() that could manifest
on SMP systems. If the reading of the current CPU's nested interrupt
count is not fully atomic on an SMP system, then an ill-timed context
switch could occur leaving the caller reading the nested interrupt
count of a different CPU.

This also applies a little defensive programming to cortex_a_r's
arch_is_in_nested_exception(). Although this routine is presently
only called with interrupts locked (which will prevent the thread
from migrating), switching to use _current_cpu instead of
arch_curr_cpu() is safer as should the routine ever be called
without meeting the locking criteria, it can be detected and fixed.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-08-02 13:19:56 +02:00
..
arc llext: add reloc and symbols for mwdt 2025-08-01 19:36:59 +01:00
arm arch: Update arch_is_in_isr() SMP implementations 2025-08-02 13:19:56 +02:00
arm64 arch: Update arch_is_in_isr() SMP implementations 2025-08-02 13:19:56 +02:00
common
mips
posix
riscv arch: riscv: core: fpu: mark unused function argument 2025-08-01 07:54:11 -04:00
rx
sparc arch: sparc: core: thread: mark unused function argument 2025-08-01 07:54:11 -04:00
x86
xtensa arch: xtensa: Fix arch_is_in_isr() race condition 2025-08-02 13:19:21 +02:00
archs.yml
CMakeLists.txt
Kconfig arch: split dynamic interrupt symbol 2025-07-30 17:37:43 -04:00