mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-02 23:04:23 +00:00
150 lines
3.7 KiB
C
150 lines
3.7 KiB
C
/*
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* Copyright 2025 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_netc_ptp_clock
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#include <zephyr/drivers/ptp_clock.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <fsl_netc_timer.h>
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struct ptp_clock_nxp_netc_config {
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const struct device *dev;
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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};
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struct ptp_clock_nxp_netc_data {
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NETC_ENETC_Type *base;
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netc_timer_handle_t handle;
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struct k_mutex ptp_mutex;
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netc_timer_config_t ptp_config;
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};
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static int ptp_clock_nxp_netc_set(const struct device *dev,
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struct net_ptp_time *tm)
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{
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struct ptp_clock_nxp_netc_data *data = dev->data;
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uint64_t nanosecond;
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int key;
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nanosecond = tm->second * NSEC_PER_SEC + tm->nanosecond;
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key = irq_lock();
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data->handle.hw.base->TMR_CNT_L = (uint32_t)nanosecond;
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data->handle.hw.base->TMR_CNT_H = (uint32_t)(nanosecond >> 32U);
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data->handle.hw.base->TMROFF_L = 0U;
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data->handle.hw.base->TMROFF_H = 0U;
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irq_unlock(key);
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return 0;
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}
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static int ptp_clock_nxp_netc_get(const struct device *dev,
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struct net_ptp_time *tm)
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{
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struct ptp_clock_nxp_netc_data *data = dev->data;
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uint64_t nanosecond;
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NETC_TimerGetCurrentTime(&data->handle, &nanosecond);
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tm->second = nanosecond / NSEC_PER_SEC;
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tm->nanosecond = nanosecond % NSEC_PER_SEC;
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return 0;
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}
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static int ptp_clock_nxp_netc_adjust(const struct device *dev,
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int increment)
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{
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struct ptp_clock_nxp_netc_data *data = dev->data;
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int key;
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key = irq_lock();
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NETC_TimerAddOffset(&data->handle, (int64_t)increment * NSEC_PER_SEC);
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irq_unlock(key);
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return 0;
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}
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static int ptp_clock_nxp_netc_rate_adjust(const struct device *dev,
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double ratio)
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{
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struct ptp_clock_nxp_netc_data *data = dev->data;
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netc_timer_config_t *ptp_config = &data->ptp_config;
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ptp_config->defaultPpb = (ratio - 1.0) * 1000000000LL;
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k_mutex_lock(&data->ptp_mutex, K_FOREVER);
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NETC_TimerAdjustFreq(&data->handle, ptp_config->defaultPpb);
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k_mutex_unlock(&data->ptp_mutex);
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return 0;
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}
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static int ptp_clock_nxp_netc_init(const struct device *dev)
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{
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const struct ptp_clock_nxp_netc_config *config = dev->config;
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struct ptp_clock_nxp_netc_data *data = dev->data;
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netc_timer_config_t *ptp_config = &data->ptp_config;
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uint32_t netc_ref_pll_rate;
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int ret = 0;
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ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &netc_ref_pll_rate);
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if (ret) {
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return ret;
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}
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ptp_config->refClkHz = netc_ref_pll_rate/2;
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ptp_config->entryNum = 0U;
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ptp_config->defaultPpb = 0U;
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ptp_config->clockSelect = kNETC_TimerSystemClk;
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k_mutex_init(&data->ptp_mutex);
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ret = NETC_TimerInit(&data->handle, ptp_config);
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if (ret != kStatus_Success) {
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return ret;
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}
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NETC_TimerEnable(&data->handle, true);
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return ret;
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}
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static DEVICE_API(ptp_clock, ptp_clock_nxp_netc_api) = {
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.set = ptp_clock_nxp_netc_set,
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.get = ptp_clock_nxp_netc_get,
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.adjust = ptp_clock_nxp_netc_adjust,
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.rate_adjust = ptp_clock_nxp_netc_rate_adjust,
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};
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#define PTP_CLOCK_NXP_NETC_INIT(n) \
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static const struct ptp_clock_nxp_netc_config \
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ptp_clock_nxp_netc_##n##_config = { \
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.dev = DEVICE_DT_INST_GET(n), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clock_subsys = (clock_control_subsys_t) \
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DT_INST_CLOCKS_CELL(n, name), \
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}; \
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\
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static struct ptp_clock_nxp_netc_data ptp_clock_nxp_netc_##n##_data; \
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\
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DEVICE_DT_INST_DEFINE(n, &ptp_clock_nxp_netc_init, NULL, \
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&ptp_clock_nxp_netc_##n##_data, \
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&ptp_clock_nxp_netc_##n##_config, \
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POST_KERNEL, CONFIG_PTP_CLOCK_INIT_PRIORITY, \
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&ptp_clock_nxp_netc_api);
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/* Only one instance supported right now */
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DT_INST_FOREACH_STATUS_OKAY(PTP_CLOCK_NXP_NETC_INIT)
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