zephyr/arch
Stephanos Ioannidis 2d6194170b arch: arm: aarch32: Fix read_timer_end_of_isr register preservation
The current implementation to preserve r0 and r3 registers around the
call to `read_timer_end_of_isr` function has the following problems:

1. STM and LDM mnemonics are used without proper suffixes, in attempt
   to implement PUSH and POP (i.e. STMFD and LDMFD). The suffix-less
   STM mnemonic is equivalent to STMEA (increment after), which clearly
   is not a PUSH operation, and this corrupts the interrupt stack,
   leading to crashes on the Cortex-R.

2. The current implementation unnecessarily preserves additional r1, r2
   and lr registers. There is no need to preserve r1 and r2 because the
   values contained in these registers are not used after the function
   call; as for the lr register, it is already pushed to the stack when
   the interrupt service routine enters.

This commit removes all the unnecessary register preservations and
fixes the incorrect STM and LDM usages.

Note that the PUSH and POP aliases are used in place of the STMFD and
LDMFD mnemonics because they are used throughout the rest of the code.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-15 15:49:27 +02:00
..
arc arch: arc: fix the bug of IRQ_ACT.U bit sync up 2020-04-14 12:52:41 -07:00
arm arch: arm: aarch32: Fix read_timer_end_of_isr register preservation 2020-04-15 15:49:27 +02:00
common tests: benchmarks: Fix incorrect ARM arch variant check 2020-04-15 15:49:27 +02:00
nios2
posix
riscv
x86 kernel: remove unused offload workqueue option 2020-04-12 18:42:27 -04:00
xtensa
CMakeLists.txt
Kconfig