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https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-26 01:06:21 +00:00
9413c8ba4d
Following migration of stm32f1xx series clock control driver to STM32Cube LL API, cleanup stm32 code base in order to take into account that this is the only clock driver available for stm32 family. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
42 lines
962 B
Plaintext
42 lines
962 B
Plaintext
CONFIG_ARM=y
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CONFIG_BOARD_STM32_MINI_A15=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103XE=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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CONFIG_UART_STM32_PORT_1=y
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIOs
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTB=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32F_PLL_SRC_HSE=y
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# produce 72MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_XTPRE=n
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CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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# APB1 clock must not to exceed 36MHz limit
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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