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https://github.com/zephyrproject-rtos/zephyr
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f9e0fa9af3
- Change default CPU Clock to 240MHz (PLL is activated) - I2C, UART will use sysclk from clock driver - esp32_enable_peripheral replaced by clock_control_on Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
35 lines
536 B
Plaintext
35 lines
536 B
Plaintext
# SPDX-License-Identifier: Apache-2.0
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CONFIG_XTENSA_RESET_VECTOR=n
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CONFIG_BOARD_ESP32=y
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CONFIG_SOC_ESP32=y
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CONFIG_MAIN_STACK_SIZE=2048
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000
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CONFIG_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_ESP32=y
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CONFIG_XTENSA_USE_CORE_CRT1=n
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CONFIG_PINMUX=y
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CONFIG_PINMUX_ESP32=y
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CONFIG_GPIO=y
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CONFIG_GPIO_ESP32=y
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CONFIG_GEN_ISR_TABLES=y
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CONFIG_GEN_IRQ_VECTOR_TABLE=n
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CONFIG_I2C=y
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CONFIG_I2C_ESP32=y
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CONFIG_I2C_0=y
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CONFIG_I2C_1=y
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CONFIG_I2C_2=n
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CONFIG_I2C_3=n
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CONFIG_CLOCK_CONTROL=y
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