mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 07:02:20 +00:00
bf53ebf2c8
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. There are few places we dont convert over to the new
types because of compatiability with ext/HALs or for ease of transition
at this point. Fixup a few of the PRI formatters so we build with newlib.
Jira: ZEP-2051
Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/*
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* Copyright (c) 2011-2014 Wind River Systems, Inc.
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* Copyright (c) 2015 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file Utilities to read/write the Model Specific Registers (MSRs)
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*/
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#include <zephyr.h>
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/**
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*
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* @brief Write to a model specific register (MSR)
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*
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* This function is used to write to an MSR.
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*
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* The definitions of the so-called "Architectural MSRs" are contained
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* in kernel_structs.h and have the format: IA32_XXX_MSR
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*
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* INTERNAL
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* 1) The 'wrmsr' instruction was introduced in the Pentium processor; executing
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* this instruction on an earlier IA-32 processor will result in an invalid
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* opcode exception.
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* 2) The 'wrmsr' uses the ECX, EDX, and EAX registers which matches the set of
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* volatile registers!
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*
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* @return N/A
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*/
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void _MsrWrite(unsigned int msr, u64_t msr_data)
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{
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__asm__ volatile (
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"movl %[msr], %%ecx\n\t"
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"movl %[data_lo], %%eax\n\t"
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"movl %[data_hi], %%edx\n\t"
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"wrmsr"
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:
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: [msr] "m" (msr),
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[data_lo] "rm" ((u32_t)(msr_data & 0xFFFFFFFF)),
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[data_hi] "rm" ((u32_t)(msr_data >> 32))
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: "eax", "ecx", "edx");
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}
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/**
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*
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* @brief Read from a model specific register (MSR)
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*
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* This function is used to read from an MSR.
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*
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* The definitions of the so-called "Architectural MSRs" are contained
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* in kernel_structs.h and have the format: IA32_XXX_MSR
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*
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* INTERNAL
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* 1) The 'rdmsr' instruction was introduced in the Pentium processor; executing
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* this instruction on an earlier IA-32 processor will result in an invalid
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* opcode exception.
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* 2) The 'rdmsr' uses the ECX, EDX, and EAX registers which matches the set of
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* volatile registers!
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*
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* @return N/A
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*/
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u64_t _MsrRead(unsigned int msr)
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{
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u64_t ret;
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__asm__ volatile (
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"movl %[msr], %%ecx\n\t"
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"rdmsr"
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: "=A" (ret)
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: [msr] "rm" (msr)
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: "ecx");
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return ret;
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}
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