mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-01 13:32:32 +00:00
971de25439
Add pin config for PWM support on ST Nucleo boards Following config is chosen: -PA0/PWM2_CH1 for F401RE and L476RG -PA8/PWM1_CH2 for F103RB Change-Id: I013e15ed35360d7777bb24ff94e0830f913a6580 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
82 lines
3.2 KiB
C
82 lines
3.2 KiB
C
/*
|
|
* Copyright (c) 2016 Open-RnD Sp. z o.o.
|
|
* Copyright (c) 2016 BayLibre, SAS
|
|
*
|
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
|
* you may not use this file except in compliance with the License.
|
|
* You may obtain a copy of the License at
|
|
*
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
|
*
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
* See the License for the specific language governing permissions and
|
|
* limitations under the License.
|
|
*/
|
|
|
|
#ifndef _STM32L4X_PINMUX_H_
|
|
#define _STM32L4X_PINMUX_H_
|
|
|
|
/**
|
|
* @file Header for STM32L4X pin multiplexing helper
|
|
*/
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PA9_USART1_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PA10_USART1_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PA2_USART2_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PA3_USART2_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB6_USART3_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PB7_USART3_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB10_USART3_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PB11_USART3_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PC4_USART3_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PC5_USART3_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PC10_USART3_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PC11_USART3_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PD5_USART2_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PD6_USART2_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PD5_USART2_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PD6_USART2_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PD8_USART3_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PD9_USART3_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PG9_USART1_TX STM32_PINMUX_FUNC_ALT_7
|
|
#define STM32L4X_PINMUX_FUNC_PG10_USART1_RX STM32_PINMUX_FUNC_ALT_7
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PB13_I2C2_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PB14_I2C2_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PF1_I2C3_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PF0_I2C3_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PG7_I2C3_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PG8_I2C3_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PG14_I2C1_SCL STM32_PINMUX_FUNC_ALT_4
|
|
#define STM32L4X_PINMUX_FUNC_PG13_I2C1_SDA STM32_PINMUX_FUNC_ALT_4
|
|
|
|
#define STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1 STM32_PINMUX_FUNC_ALT_1
|
|
|
|
#endif /* _STM32L4X_PINMUX_H_ */
|