mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 05:21:57 +00:00
e15c5527ed
The new Nordic MDK redefines certain UART signal names for backwards compatibility with the new nRF52840 IC. This patch addresses the potential name conflict between the redefined signals and the existing variable names defined in the UART driver. JIRA: ZEP-1418 Change-Id: I559d9335d2eeaa0a88d3f261b70508a1c98b989d Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
535 lines
13 KiB
C
535 lines
13 KiB
C
/*
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* Copyright (c) 2016 Nordic Semiconductor ASA
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief Driver for Nordic Semiconductor nRF5X UART
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <misc/__assert.h>
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#include <board.h>
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#include <init.h>
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#include <uart.h>
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#include <sections.h>
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#include <gpio.h>
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#ifdef CONFIG_SOC_NRF52840
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/* Undefine MDK-defined macros */
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#ifdef PSELRTS
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#undef PSELRTS
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#endif
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#ifdef PSELCTS
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#undef PSELCTS
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#endif
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#ifdef PSELTXD
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#undef PSELTXD
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#endif
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#ifdef PSELRXD
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#undef PSELRXD
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#endif
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#endif
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/* UART structure for nRF5X. More detailed description of each register can be found in nrf5X.h */
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struct _uart {
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__O uint32_t TASKS_STARTRX;
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__O uint32_t TASKS_STOPRX;
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__O uint32_t TASKS_STARTTX;
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__O uint32_t TASKS_STOPTX;
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__I uint32_t RESERVED0[3];
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__O uint32_t TASKS_SUSPEND;
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__I uint32_t RESERVED1[56];
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__IO uint32_t EVENTS_CTS;
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__IO uint32_t EVENTS_NCTS;
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__IO uint32_t EVENTS_RXDRDY;
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__I uint32_t RESERVED2[4];
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__IO uint32_t EVENTS_TXDRDY;
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__I uint32_t RESERVED3;
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__IO uint32_t EVENTS_ERROR;
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__I uint32_t RESERVED4[7];
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__IO uint32_t EVENTS_RXTO;
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__I uint32_t RESERVED5[46];
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__IO uint32_t SHORTS;
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__I uint32_t RESERVED6[64];
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__IO uint32_t INTENSET;
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__IO uint32_t INTENCLR;
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__I uint32_t RESERVED7[93];
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__IO uint32_t ERRORSRC;
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__I uint32_t RESERVED8[31];
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__IO uint32_t ENABLE;
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__I uint32_t RESERVED9;
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__IO uint32_t PSELRTS;
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__IO uint32_t PSELTXD;
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__IO uint32_t PSELCTS;
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__IO uint32_t PSELRXD;
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__I uint32_t RXD;
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__O uint32_t TXD;
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__I uint32_t RESERVED10;
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__IO uint32_t BAUDRATE;
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__I uint32_t RESERVED11[17];
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__IO uint32_t CONFIG;
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};
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/* Device data structure */
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struct uart_nrf5_dev_data_t {
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uint32_t baud_rate; /**< Baud rate */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_t cb; /**< Callback function pointer */
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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/* convenience defines */
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#define DEV_CFG(dev) \
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((const struct uart_device_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct uart_nrf5_dev_data_t * const)(dev)->driver_data)
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#define UART_STRUCT(dev) \
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((volatile struct _uart *)(DEV_CFG(dev))->base)
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#define UART_IRQ_MASK_RX (1 << 2)
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#define UART_IRQ_MASK_TX (1 << 3)
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#define UART_IRQ_MASK_ERROR (1 << 4)
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static const struct uart_driver_api uart_nrf5_driver_api;
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/**
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* @brief Set the baud rate
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*
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* This routine set the given baud rate for the UART.
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*
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* @param dev UART device struct
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* @param baudrate Baud rate
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* @param sys_clk_freq_hz System clock frequency in Hz
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*
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* @return N/A
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*/
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static int baudrate_set(struct device *dev,
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uint32_t baudrate, uint32_t sys_clk_freq_hz)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint32_t divisor; /* baud rate divisor */
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/* Use the common nRF5 macros */
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switch (baudrate) {
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case 1200:
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divisor = NRF5_UART_BAUDRATE_1200;
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break;
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case 2400:
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divisor = NRF5_UART_BAUDRATE_2400;
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break;
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case 4800:
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divisor = NRF5_UART_BAUDRATE_4800;
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break;
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case 9600:
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divisor = NRF5_UART_BAUDRATE_9600;
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break;
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case 14400:
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divisor = NRF5_UART_BAUDRATE_14400;
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break;
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case 19200:
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divisor = NRF5_UART_BAUDRATE_19200;
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break;
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case 28800:
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divisor = NRF5_UART_BAUDRATE_28800;
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break;
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case 38400:
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divisor = NRF5_UART_BAUDRATE_38400;
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break;
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case 57600:
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divisor = NRF5_UART_BAUDRATE_57600;
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break;
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case 76800:
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divisor = NRF5_UART_BAUDRATE_76800;
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break;
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case 115200:
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divisor = NRF5_UART_BAUDRATE_115200;
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break;
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case 230400:
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divisor = NRF5_UART_BAUDRATE_230400;
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break;
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case 250000:
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divisor = NRF5_UART_BAUDRATE_250000;
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break;
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case 460800:
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divisor = NRF5_UART_BAUDRATE_460800;
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break;
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case 921600:
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divisor = NRF5_UART_BAUDRATE_921600;
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break;
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case 1000000:
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divisor = NRF5_UART_BAUDRATE_1000000;
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break;
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default:
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return -EINVAL;
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}
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uart->BAUDRATE = divisor << UART_BAUDRATE_BAUDRATE_Pos;
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return 0;
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}
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/**
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* @brief Initialize UART channel
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*
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* This routine is called to reset the chip in a quiescent state.
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* It is assumed that this function is called only once per UART.
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*
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* @param dev UART device struct
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*
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* @return 0 on success
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*/
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static int uart_nrf5_init(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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struct device *gpio_dev;
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int err;
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gpio_dev = device_get_binding(CONFIG_GPIO_NRF5_P0_DEV_NAME);
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(void) gpio_pin_configure(gpio_dev,
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CONFIG_UART_NRF5_GPIO_TX_PIN,
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(GPIO_DIR_OUT | GPIO_PUD_PULL_UP));
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(void) gpio_pin_configure(gpio_dev,
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CONFIG_UART_NRF5_GPIO_RX_PIN,
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(GPIO_DIR_IN));
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uart->PSELTXD = CONFIG_UART_NRF5_GPIO_TX_PIN;
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uart->PSELRXD = CONFIG_UART_NRF5_GPIO_RX_PIN;
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#ifdef CONFIG_UART_NRF5_FLOW_CONTROL
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(void) gpio_pin_configure(gpio_dev,
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CONFIG_UART_NRF5_GPIO_RTS_PIN,
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(GPIO_DIR_OUT));
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(void) gpio_pin_configure(gpio_dev,
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CONFIG_UART_NRF5_GPIO_CTS_PIN,
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(GPIO_DIR_IN));
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uart->PSELRTS = CONFIG_UART_NRF5_GPIO_RTS_PIN;
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uart->PSELCTS = CONFIG_UART_NRF5_GPIO_CTS_PIN;
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uart->CONFIG = (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos);
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#endif /* CONFIG_UART_NRF5_FLOW_CONTROL */
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DEV_DATA(dev)->baud_rate = CONFIG_UART_NRF5_BAUD_RATE;
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/* Set baud rate */
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err = baudrate_set(dev, DEV_DATA(dev)->baud_rate,
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DEV_CFG(dev)->sys_clk_freq);
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if (err) {
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return err;
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}
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/* Enable receiver and transmitter */
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uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
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uart->EVENTS_TXDRDY = 0;
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uart->EVENTS_RXDRDY = 0;
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uart->TASKS_STARTTX = 1;
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uart->TASKS_STARTRX = 1;
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dev->driver_api = &uart_nrf5_driver_api;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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DEV_CFG(dev)->irq_config_func(dev);
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#endif
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return 0;
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}
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/**
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* @brief Poll the device for input.
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*
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* @param dev UART device struct
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* @param c Pointer to character
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*
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* @return 0 if a character arrived, -1 if the input buffer if empty.
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*/
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static int uart_nrf5_poll_in(struct device *dev, unsigned char *c)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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if (!uart->EVENTS_RXDRDY) {
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return -1;
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}
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/* Clear the interrupt */
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uart->EVENTS_RXDRDY = 0;
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/* got a character */
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*c = (unsigned char)uart->RXD;
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return 0;
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}
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/**
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* @brief Output a character in polled mode.
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*
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* Checks if the transmitter is empty. If empty, a character is written to
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* the data register.
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*
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* @param dev UART device struct
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* @param c Character to send
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*
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* @return Sent character
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*/
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static unsigned char uart_nrf5_poll_out(struct device *dev,
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unsigned char c)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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/* send a character */
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uart->TXD = (uint8_t)c;
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/* Wait for transmitter to be ready */
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while (!uart->EVENTS_TXDRDY) {
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}
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uart->EVENTS_TXDRDY = 0;
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return c;
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}
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/** Console I/O function */
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static int uart_nrf5_err_check(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint32_t error = 0;
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if (uart->EVENTS_ERROR) {
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/* register bitfields maps to the defines in uart.h */
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error = uart->ERRORSRC;
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/* Clear the register */
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uart->ERRORSRC = error;
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}
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error = error & 0x0F;
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return error;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/** Interrupt driven FIFO fill function */
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static int uart_nrf5_fifo_fill(struct device *dev, const uint8_t *tx_data, int len)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint8_t num_tx = 0;
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while ((len - num_tx > 0) && uart->EVENTS_TXDRDY) {
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/* Clear the interrupt */
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uart->EVENTS_TXDRDY = 0;
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/* Send a character */
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uart->TXD = (uint8_t)tx_data[num_tx++];
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}
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return (int)num_tx;
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}
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/** Interrupt driven FIFO read function */
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static int uart_nrf5_fifo_read(struct device *dev, uint8_t *rx_data, const int size)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint8_t num_rx = 0;
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while ((size - num_rx > 0) && uart->EVENTS_RXDRDY) {
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/* Clear the interrupt */
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uart->EVENTS_RXDRDY = 0;
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/* Receive a character */
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rx_data[num_rx++] = (uint8_t)uart->RXD;
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}
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return num_rx;
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}
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/** Interrupt driven transfer enabling function */
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static void uart_nrf5_irq_tx_enable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENSET |= UART_IRQ_MASK_TX;
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}
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/** Interrupt driven transfer disabling function */
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static void uart_nrf5_irq_tx_disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENCLR |= UART_IRQ_MASK_TX;
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}
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/** Interrupt driven transfer ready function */
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static int uart_nrf5_irq_tx_ready(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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return uart->EVENTS_TXDRDY;
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}
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/** Interrupt driven receiver enabling function */
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static void uart_nrf5_irq_rx_enable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENSET |= UART_IRQ_MASK_RX;
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}
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/** Interrupt driven receiver disabling function */
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static void uart_nrf5_irq_rx_disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENCLR |= UART_IRQ_MASK_RX;
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}
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/** Interrupt driven transfer empty function */
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static int uart_nrf5_irq_tx_empty(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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return !(uart->EVENTS_TXDRDY);
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}
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/** Interrupt driven receiver ready function */
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static int uart_nrf5_irq_rx_ready(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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return uart->EVENTS_RXDRDY;
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}
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/** Interrupt driven error enabling function */
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static void uart_nrf5_irq_err_enable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENSET |= UART_IRQ_MASK_ERROR;
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}
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/** Interrupt driven error disabling function */
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static void uart_nrf5_irq_err_disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->INTENCLR |= UART_IRQ_MASK_ERROR;
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}
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/** Interrupt driven pending status function */
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static int uart_nrf5_irq_is_pending(struct device *dev)
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{
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return (uart_nrf5_irq_tx_ready(dev) || uart_nrf5_irq_rx_ready(dev));
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}
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/** Interrupt driven interrupt update function */
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static int uart_nrf5_irq_update(struct device *dev)
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{
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return 1;
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}
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/** Set the callback function */
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static void uart_nrf5_irq_callback_set(struct device *dev, uart_irq_callback_t cb)
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{
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struct uart_nrf5_dev_data_t * const dev_data = DEV_DATA(dev);
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dev_data->cb = cb;
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}
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/**
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* @brief Interrupt service routine.
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*
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* This simply calls the callback function, if one exists.
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*
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* @param arg Argument to ISR.
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*
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* @return N/A
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*/
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void uart_nrf5_isr(void *arg)
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{
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struct device *dev = arg;
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struct uart_nrf5_dev_data_t * const dev_data = DEV_DATA(dev);
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if (dev_data->cb) {
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dev_data->cb(dev);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_driver_api uart_nrf5_driver_api = {
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.poll_in = uart_nrf5_poll_in, /** Console I/O function */
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.poll_out = uart_nrf5_poll_out, /** Console I/O function */
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.err_check = uart_nrf5_err_check, /** Console I/O function */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_nrf5_fifo_fill, /** IRQ FIFO fill function */
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.fifo_read = uart_nrf5_fifo_read, /** IRQ FIFO read function */
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.irq_tx_enable = uart_nrf5_irq_tx_enable, /** IRQ transfer enabling function */
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.irq_tx_disable = uart_nrf5_irq_tx_disable, /** IRQ transfer disabling function */
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.irq_tx_ready = uart_nrf5_irq_tx_ready, /** IRQ transfer ready function */
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.irq_rx_enable = uart_nrf5_irq_rx_enable, /** IRQ receiver enabling function */
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.irq_rx_disable = uart_nrf5_irq_rx_disable, /** IRQ receiver disabling function */
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.irq_tx_empty = uart_nrf5_irq_tx_empty, /** IRQ transfer empty function */
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.irq_rx_ready = uart_nrf5_irq_rx_ready, /** IRQ receiver ready function */
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.irq_err_enable = uart_nrf5_irq_err_enable, /** IRQ error enabling function */
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.irq_err_disable = uart_nrf5_irq_err_disable, /** IRQ error disabling function */
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.irq_is_pending = uart_nrf5_irq_is_pending, /** IRQ pending status function */
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.irq_update = uart_nrf5_irq_update, /** IRQ interrupt update function */
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.irq_callback_set = uart_nrf5_irq_callback_set, /** Set the callback function */
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/* Forward declare function */
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static void uart_nrf5_irq_config(struct device *port);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_device_config uart_nrf5_dev_cfg_0 = {
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.base = (uint8_t *)NRF_UART0_BASE,
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.sys_clk_freq = CONFIG_UART_NRF5_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = uart_nrf5_irq_config,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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static struct uart_nrf5_dev_data_t uart_nrf5_dev_data_0 = {
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.baud_rate = CONFIG_UART_NRF5_BAUD_RATE,
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};
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DEVICE_INIT(uart_nrf5_0, CONFIG_UART_NRF5_NAME, &uart_nrf5_init,
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&uart_nrf5_dev_data_0, &uart_nrf5_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_nrf5_irq_config(struct device *port)
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{
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IRQ_CONNECT(NRF5_IRQ_UART0_IRQn,
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CONFIG_UART_NRF5_IRQ_PRI,
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uart_nrf5_isr, DEVICE_GET(uart_nrf5_0),
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0);
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irq_enable(NRF5_IRQ_UART0_IRQn);
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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