zephyr/soc
Andrew Boie 6fd6b7e50a xtensa: remove legacy arch implementation
We re-wrote the xtensa arch code, but never got around
to purging the old implementation.

Removed those boards which hadn't been moved to the new
arch code. These were all xt-sim simulator targets and not
real hardware.

Fixes: #18138

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-12 01:26:34 -04:00
..
arc arc: rearrange for standard use of extern "C" 2019-08-20 00:49:15 +02:00
arm drivers: watchdog: stm32: Add implementation for WWDG 2019-09-11 22:13:36 -05:00
nios2
posix
riscv interrupt: Convert RISC-V plic to use multi-level irq support 2019-09-10 07:34:57 -05:00
x86 x86: fix XIP SOC support and defaults 2019-09-11 21:11:38 -04:00
x86_64/x86_64
xtensa xtensa: remove legacy arch implementation 2019-09-12 01:26:34 -04:00
Kconfig riscv32: rename to riscv 2019-08-02 13:54:48 -07:00