mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-09 13:42:34 +00:00
20202902f2
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
/*
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* Copyright (c) 2018 Google LLC.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <pinmux.h>
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#include <soc.h>
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struct pinmux_sam0_config {
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PortGroup *regs;
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};
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static int pinmux_sam0_set(struct device *dev, u32_t pin, u32_t func)
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{
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const struct pinmux_sam0_config *cfg = dev->config->config_info;
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bool odd_pin = pin & 1;
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int idx = pin / 2;
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/* Each pinmux register holds the config for two pins. The
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* even numbered pin goes in the bits 0..3 and the odd
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* numbered pin in bits 4..7.
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*/
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if (odd_pin) {
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cfg->regs->PMUX[idx].bit.PMUXO = func;
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} else {
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cfg->regs->PMUX[idx].bit.PMUXE = func;
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}
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cfg->regs->PINCFG[pin].bit.PMUXEN = 1;
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return 0;
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}
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static int pinmux_sam0_get(struct device *dev, u32_t pin, u32_t *func)
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{
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const struct pinmux_sam0_config *cfg = dev->config->config_info;
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bool odd_pin = pin & 1;
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int idx = pin / 2;
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if (odd_pin) {
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*func = cfg->regs->PMUX[idx].bit.PMUXO;
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} else {
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*func = cfg->regs->PMUX[idx].bit.PMUXE;
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}
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return 0;
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}
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static int pinmux_sam0_pullup(struct device *dev, u32_t pin, u8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_sam0_input(struct device *dev, u32_t pin, u8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_sam0_init(struct device *dev)
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{
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/* Nothing to do. The GPIO clock is enabled at reset. */
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return 0;
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}
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const struct pinmux_driver_api pinmux_sam0_api = {
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.set = pinmux_sam0_set,
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.get = pinmux_sam0_get,
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.pullup = pinmux_sam0_pullup,
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.input = pinmux_sam0_input,
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};
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#if DT_PINMUX_SAM0_A_BASE_ADDRESS
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static const struct pinmux_sam0_config pinmux_sam0_config_0 = {
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.regs = (PortGroup *)DT_PINMUX_SAM0_A_BASE_ADDRESS,
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};
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DEVICE_AND_API_INIT(pinmux_sam0_0, DT_PINMUX_SAM0_A_LABEL,
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pinmux_sam0_init, NULL, &pinmux_sam0_config_0,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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#if DT_PINMUX_SAM0_B_BASE_ADDRESS
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static const struct pinmux_sam0_config pinmux_sam0_config_1 = {
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.regs = (PortGroup *)DT_PINMUX_SAM0_B_BASE_ADDRESS,
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};
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DEVICE_AND_API_INIT(pinmux_sam0_1, DT_PINMUX_SAM0_B_LABEL,
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pinmux_sam0_init, NULL, &pinmux_sam0_config_1,
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PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY,
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&pinmux_sam0_api);
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#endif
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