zephyr/drivers/serial
Andy Ross 662835a798 drivers/serial/ns16550: Unbreak 64 bit MMIO addresses
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory.  Remove pointer size assumptions.

Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address.  That struct has other stuff in it, and the
only thing we need is the single MMIO address.  It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
..
CMakeLists.txt
Kconfig
Kconfig.altera_jtag
Kconfig.cc13xx_cc26xx
Kconfig.cc32xx
Kconfig.cmsdk_apb
Kconfig.esp32
Kconfig.gecko
Kconfig.imx
Kconfig.leuart_gecko
Kconfig.litex
Kconfig.mcux
Kconfig.mcux_flexcomm
Kconfig.mcux_lpsci
Kconfig.mcux_lpuart
Kconfig.miv
Kconfig.msp432p4xx
Kconfig.native_posix
Kconfig.nrfx
Kconfig.ns16550
Kconfig.nsim
Kconfig.nuvoton
Kconfig.pl011
Kconfig.psoc6
Kconfig.rtt
Kconfig.rv32m1_lpuart
Kconfig.sam0
Kconfig.sifive
Kconfig.stellaris
Kconfig.stm32
Kconfig.uart_sam
Kconfig.usart_sam
Kconfig.xlnx
Kconfig.xmc4xxx
leuart_gecko.c zephyr: replace zephyr integer types with C99 types 2020-06-08 08:23:57 -05:00
uart_altera_jtag_hal.c
uart_cc13xx_cc26xx.c
uart_cc32xx.c
uart_cmsdk_apb.c
uart_esp32.c
uart_gecko.c
uart_handlers.c
uart_imx.c
uart_liteuart.c
uart_mcux_flexcomm.c
uart_mcux_lpsci.c
uart_mcux_lpuart.c
uart_mcux.c
uart_miv.c
uart_msp432p4xx.c
uart_native_posix.c
uart_nrfx_uart.c
uart_nrfx_uarte.c
uart_ns16550_port_x.h
uart_ns16550.c
uart_ns16550.h
uart_nsim.c
uart_nuvoton.c
uart_pl011.c
uart_psoc6.c
uart_rtt.c
uart_rv32m1_lpuart.c
uart_sam.c
uart_sam0.c
uart_sifive.c
uart_stellaris.c
uart_stm32.c
uart_stm32.h
uart_xlnx_ps.c
uart_xmc4xxx.c
usart_sam.c