mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-10 07:16:14 +00:00
4dcfb5531c
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs
This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.
Note that only the ISR passed to IRQ_CONNECT are of interest here.
In order to do so, the script fix_isr.py below is necessary:
from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os
cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
...
(
const struct device *D = (const struct device *)P;
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const struct device *D = P;
)
...
}
@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
...
const struct device *D;
...
(
D = (const struct device *)P;
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D = P;
)
...
}
@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
...
}
@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);
@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
...
(
-const struct device *D = (const struct device *)P;
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-const struct device *D = P;
)
...
}
@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
...
-const struct device *D;
...
(
-D = (const struct device *)P;
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-D = P;
)
...
}
"""
def find_isr(fn):
db = []
data = None
start = 0
try:
with open(fn, 'r+') as f:
data = str(mmap.mmap(f.fileno(), 0).read())
except Exception as e:
return db
while True:
isr = ""
irq = data.find('IRQ_CONNECT', start)
while irq > -1:
p = 1
arg = 1
p_o = data.find('(', irq)
if p_o < 0:
irq = -1
break;
pos = p_o + 1
while p > 0:
if data[pos] == ')':
p -= 1
elif data[pos] == '(':
p += 1
elif data[pos] == ',' and p == 1:
arg += 1
if arg == 3:
isr += data[pos]
pos += 1
isr = isr.strip(',\\n\\t ')
if isr not in db and len(isr) > 0:
db.append(isr)
start = pos
break
if irq < 0:
break
return db
def patch_isr(fn, isr_list):
if len(isr_list) <= 0:
return
for isr in isr_list:
tmplt = cocci_template.replace('<!fn!>', isr)
with open('/tmp/isr_fix.cocci', 'w') as f:
f.write(tmplt)
cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]
subprocess.run(cmd)
def process_files(path):
if path.is_file() and path.suffix in ['.h', '.c']:
p = str(path.parent) + '/' + path.name
isr_list = find_isr(p)
patch_isr(p, isr_list)
elif path.is_dir():
for p in path.iterdir():
process_files(p)
if len(sys.argv) < 2:
print("You need to provide a dir/file path")
sys.exit(1)
process_files(Path(sys.argv[1]))
And is run: ./fix_isr.py <zephyr root directory>
Finally, some files needed manual fixes such.
Fixes #27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
/*
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* Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT litex_eth0
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <init.h>
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#include <irq.h>
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#include <device.h>
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#include <zephyr.h>
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#include <zephyr/types.h>
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#define IRQ_MASK DT_REG_ADDR_BY_NAME(DT_INST(0, vexriscv_intc0), irq_mask)
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#define IRQ_PENDING DT_REG_ADDR_BY_NAME(DT_INST(0, vexriscv_intc0), irq_pending)
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#define TIMER0_IRQ DT_IRQN(DT_INST(0, litex_timer0))
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#define UART0_IRQ DT_IRQN(DT_INST(0, litex_uart0))
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#define ETH0_IRQ DT_IRQN(DT_INST(0, litex_eth0))
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#define I2S_RX_IRQ DT_IRQN(DT_NODELABEL(i2s_rx))
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#define I2S_TX_IRQ DT_IRQN(DT_NODELABEL(i2s_tx))
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static inline void vexriscv_litex_irq_setmask(uint32_t mask)
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{
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__asm__ volatile ("csrw %0, %1" :: "i"(IRQ_MASK), "r"(mask));
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}
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static inline uint32_t vexriscv_litex_irq_getmask(void)
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{
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uint32_t mask;
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__asm__ volatile ("csrr %0, %1" : "=r"(mask) : "i"(IRQ_MASK));
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return mask;
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}
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static inline uint32_t vexriscv_litex_irq_pending(void)
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{
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uint32_t pending;
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__asm__ volatile ("csrr %0, %1" : "=r"(pending) : "i"(IRQ_PENDING));
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return pending;
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}
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static inline void vexriscv_litex_irq_setie(uint32_t ie)
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{
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if (ie) {
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__asm__ volatile ("csrrs x0, mstatus, %0"
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:: "r"(MSTATUS_IEN));
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} else {
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__asm__ volatile ("csrrc x0, mstatus, %0"
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:: "r"(MSTATUS_IEN));
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}
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}
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static void vexriscv_litex_irq_handler(const void *device)
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{
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struct _isr_table_entry *ite;
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uint32_t pending, mask, irqs;
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pending = vexriscv_litex_irq_pending();
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mask = vexriscv_litex_irq_getmask();
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irqs = pending & mask;
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#ifdef CONFIG_LITEX_TIMER
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if (irqs & (1 << TIMER0_IRQ)) {
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ite = &_sw_isr_table[TIMER0_IRQ];
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ite->isr(ite->arg);
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}
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#endif
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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if (irqs & (1 << UART0_IRQ)) {
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ite = &_sw_isr_table[UART0_IRQ];
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ite->isr(ite->arg);
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}
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#endif
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#ifdef CONFIG_ETH_LITEETH
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if (irqs & (1 << ETH0_IRQ)) {
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ite = &_sw_isr_table[ETH0_IRQ];
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ite->isr(ite->arg);
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}
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#endif
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#ifdef CONFIG_I2S
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if (irqs & (1 << I2S_RX_IRQ)) {
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ite = &_sw_isr_table[I2S_RX_IRQ];
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ite->isr(ite->arg);
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}
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if (irqs & (1 << I2S_TX_IRQ)) {
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ite = &_sw_isr_table[I2S_TX_IRQ];
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ite->isr(ite->arg);
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}
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#endif
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}
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void arch_irq_enable(unsigned int irq)
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{
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vexriscv_litex_irq_setmask(vexriscv_litex_irq_getmask() | (1 << irq));
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}
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void arch_irq_disable(unsigned int irq)
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{
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vexriscv_litex_irq_setmask(vexriscv_litex_irq_getmask() & ~(1 << irq));
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}
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int arch_irq_is_enabled(unsigned int irq)
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{
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return vexriscv_litex_irq_getmask() & (1 << irq);
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}
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static int vexriscv_litex_irq_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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__asm__ volatile ("csrrs x0, mie, %0"
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:: "r"((1 << RISCV_MACHINE_TIMER_IRQ)
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| (1 << RISCV_MACHINE_EXT_IRQ)));
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vexriscv_litex_irq_setie(1);
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IRQ_CONNECT(RISCV_MACHINE_EXT_IRQ, 0, vexriscv_litex_irq_handler,
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NULL, 0);
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return 0;
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}
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SYS_INIT(vexriscv_litex_irq_init, PRE_KERNEL_2,
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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