mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 05:11:57 +00:00
9283ee7acc
This patch adds the RDC (Resource Domain Controller) peripheral permissions settings for the i.MX applications cores (Cortex A9 on i.MX6 and Cortex A7 on i.MX7). This will enable both Linux (on application's core) and Zephyr (on M4 core) to share the peripherals and coexist. The settings are defined at devicetree level and applied in the soc.c. A complete solution should involve the SEMA4 to control the peripherals access and prevent resource deadlocking and misusage. Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
380 lines
9.1 KiB
Plaintext
380 lines
9.1 KiB
Plaintext
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/rdc/imx_rdc.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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soc {
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ddr_code: code@10000000 {
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compatible = "nxp,imx-code-bus";
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reg = <0x10000000 0xfff0000>;
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label = "DDR CODE";
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};
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ddr_sys: memory@80000000 {
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device_type = "memory";
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compatible = "nxp,imx-sys-bus";
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reg = <0x80000000 0x60000000>;
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label = "DDR SYSTEM";
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};
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tcml_code: code@1fff8000 {
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compatible = "nxp,imx-code-bus";
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reg = <0x1fff8000 0x8000>;
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label = "TCML CODE";
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};
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tcmu_sys: memory@20000000 {
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device_type = "memory";
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compatible = "nxp,imx-sys-bus";
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reg = <0x20000000 0x8000>;
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label = "TCMU SYSTEM";
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};
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ocram_code: code@900000 {
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compatible = "nxp,imx-code-bus";
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reg = <0x00900000 0x20000>;
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label = "OCRAM CODE";
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};
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ocram_sys: memory@20200000 {
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device_type = "memory";
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compatible = "nxp,imx-sys-bus";
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reg = <0x20200000 0x20000>;
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label = "OCRAM SYSTEM";
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};
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ocram_s_code: code@20180000 {
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compatible = "nxp,imx-code-bus";
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reg = <0x20180000 0x8000>;
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label = "OCRAM_S CODE";
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};
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ocram_s_sys: memory@180000 {
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device_type = "memory";
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compatible = "nxp,imx-sys-bus";
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reg = <0x00180000 0x8000>;
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label = "OCRAM_S SYSTEM";
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};
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gpio1: gpio@30200000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30200000 0x10000>;
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interrupts = <64 0>, <65 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio2: gpio@30210000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30210000 0x10000>;
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interrupts = <66 0>, <67 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio3: gpio@30220000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30220000 0x10000>;
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interrupts = <68 0>, <69 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio4: gpio@30230000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30230000 0x10000>;
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interrupts = <70 0>, <71 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio5: gpio@30240000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30240000 0x10000>;
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interrupts = <72 0>, <73 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_5";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio6: gpio@30250000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30250000 0x10000>;
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interrupts = <74 0>, <75 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "GPIO_6";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio7: gpio@30260000 {
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compatible = "nxp,imx-gpio";
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reg = <0x30260000 0x10000>;
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interrupts = <76 0>, <77 0>;
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label = "GPIO_7";
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* For now only uart2 is supported and
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* tested with the serial driver
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*/
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uart1: uart@30860000 {
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compatible = "nxp,imx-uart";
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reg = <0x30860000 0x10000>;
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interrupts = <26 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: uart@30890000 {
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compatible = "nxp,imx-uart";
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reg = <0x30890000 0x10000>;
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interrupts = <27 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_2";
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status = "disabled";
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};
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uart3: uart@30880000 {
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compatible = "nxp,imx-uart";
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reg = <0x30880000 0x10000>;
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interrupts = <28 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_3";
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status = "disabled";
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};
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uart4: uart@30A60000 {
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compatible = "nxp,imx-uart";
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reg = <0x30A60000 0x10000>;
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interrupts = <29 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_4";
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status = "disabled";
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};
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uart5: uart@30A70000 {
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compatible = "nxp,imx-uart";
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reg = <0x30A70000 0x10000>;
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interrupts = <30 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_5";
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status = "disabled";
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};
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uart6: uart@30A80000 {
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compatible = "nxp,imx-uart";
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reg = <0x30A80000 0x10000>;
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interrupts = <16 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_6";
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status = "disabled";
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};
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uart7: uart@30A90000 {
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compatible = "nxp,imx-uart";
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reg = <0x30A90000 0x10000>;
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interrupts = <126 3>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "UART_7";
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status = "disabled";
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};
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i2c1: i2c@30A20000 {
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compatible = "fsl,imx7d-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x30A20000 0x10000>;
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interrupts = <35 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "I2C_1";
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status = "disabled";
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};
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i2c2: i2c@30A30000 {
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compatible = "fsl,imx7d-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x30A30000 0x10000>;
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interrupts = <36 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "I2C_2";
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status = "disabled";
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};
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i2c3: i2c@30A40000 {
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compatible = "fsl,imx7d-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x30A40000 0x10000>;
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interrupts = <37 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "I2C_3";
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status = "disabled";
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};
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i2c4: i2c@30A50000 {
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compatible = "fsl,imx7d-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x30A50000 0x10000>;
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interrupts = <38 0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "I2C_4";
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status = "disabled";
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};
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pwm1: pwm@30660000 {
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compatible = "fsl,imx7d-pwm";
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reg = <0x30660000 0x10000>;
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interrupts = <81 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "PWM_1";
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status = "disabled";
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};
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pwm2: pwm@30670000 {
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compatible = "fsl,imx7d-pwm";
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reg = <0x30670000 0x10000>;
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interrupts = <82 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "PWM_2";
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status = "disabled";
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};
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pwm3: pwm@30680000 {
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compatible = "fsl,imx7d-pwm";
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reg = <0x30680000 0x10000>;
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interrupts = <83 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "PWM_3";
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status = "disabled";
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};
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pwm4: pwm@30690000 {
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compatible = "fsl,imx7d-pwm";
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reg = <0x30690000 0x10000>;
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interrupts = <84 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "PWM_4";
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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