Michael Hope 42accf2e64 disk: add a SDHC card over SPI driver. ... Features: - Uses the SPI bus to communicate with the card - Detects and safely rejects SDSC (<= 2 GiB) cards - Uses the optional CRC support for data integrity - Retries resumable errors like CRC failure or temporary IO failure - Works well with ELMFAT - When used on a device with a FIFO or DMA, achieves >= 310 KiB/s on a 4 MHz bus Tested on a mix of SanDisk, Samsung, 4V, and ADATA cards from 4 GiB to 32 GiB. Signed-off-by: Michael Hope <mlhx@google.com>		2018-12-30 16:24:10 -05:00
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arc
arm	dts: stm32f3: GPIO clocks are actually handled from AHB1 bus	2018-12-26 09:43:36 -05:00
bindings	disk: add a SDHC card over SPI driver.	2018-12-30 16:24:10 -05:00
common
nios2
riscv32	soc/sifive-freedom: Use DTS to generate PLIC addrs	2018-12-04 07:48:27 -06:00
x86
xtensa	dts: intel_s1000: add pinctrl to device tree	2018-11-29 14:23:24 -08:00
Kconfig