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https://github.com/zephyrproject-rtos/zephyr
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15b44146cd
Update the qmsi dma shim driver based on the new dma api interface. Recently, a RFC was posted to update the dma api. The update to dma api interface was already posted. This change is to update the dma qmsi shim driver based on the dma api change. It is using the new data structures and new api function names. Jira: ZEP-873 Change-Id: If9a772c5ff1c2b10fca05172c48f75223bbf940e Signed-off-by: Baohong Liu <baohong.liu@intel.com> Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
393 lines
12 KiB
C
393 lines
12 KiB
C
/**
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* @file
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*
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* @brief Public APIs for the DMA drivers.
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*/
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _DMA_H_
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#define _DMA_H_
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#include <kernel.h>
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#include <device.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief DMA Interface
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* @defgroup DMA_interface DMA Interface
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* @ingroup io_interfaces
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* @{
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*/
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enum dma_handshake_polarity {
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HANDSHAKE_POLARITY_HIGH = 0x0,
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HANDSHAKE_POLARITY_LOW
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};
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enum dma_burst_length {
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BURST_TRANS_LENGTH_1 = 0x0,
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BURST_TRANS_LENGTH_4,
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BURST_TRANS_LENGTH_8,
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BURST_TRANS_LENGTH_16,
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BURST_TRANS_LENGTH_32,
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BURST_TRANS_LENGTH_64,
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BURST_TRANS_LENGTH_128,
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BURST_TRANS_LENGTH_256
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};
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enum dma_transfer_width {
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TRANS_WIDTH_8 = 0x0,
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TRANS_WIDTH_16,
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TRANS_WIDTH_32,
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TRANS_WIDTH_64,
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TRANS_WIDTH_128,
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TRANS_WIDTH_256
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};
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enum dma_channel_direction {
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MEMORY_TO_MEMORY = 0x0,
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MEMORY_TO_PERIPHERAL,
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PERIPHERAL_TO_MEMORY
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};
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/**
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* @brief DMA Channel Configuration.
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*
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* This defines a single channel configuration on the DMA controller.
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*/
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struct dma_channel_config {
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/* Hardware Interface handshake for peripheral (I2C, SPI, etc) */
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uint32_t handshake_interface;
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/* Select active polarity for handshake (low/high) */
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enum dma_handshake_polarity handshake_polarity;
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/* DMA transfer direction from mem/peripheral to mem/peripheral */
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enum dma_channel_direction channel_direction;
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/* Data item size read from source */
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enum dma_transfer_width source_transfer_width;
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/* Data item size written to destination */
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enum dma_transfer_width destination_transfer_width;
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/* Number of data items read */
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enum dma_burst_length source_burst_length;
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/* Number of data items written */
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enum dma_burst_length destination_burst_length;
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/* Completed transaction callback */
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void (*dma_transfer)(struct device *dev, void *data);
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/* Error callback */
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void (*dma_error)(struct device *dev, void *data);
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/* Client callback private data */
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void *callback_data;
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};
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/**
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* @brief DMA transfer Configuration.
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*
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* This defines a single transfer on configured channel of the DMA controller.
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*/
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struct dma_transfer_config {
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/* Total amount of data in bytes to transfer */
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uint32_t block_size;
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/* Source address for the transaction */
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uint32_t *source_address;
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/* Destination address */
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uint32_t *destination_address;
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};
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/**
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* @brief DMA block configuration structure.
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*
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* source_address is block starting address at source
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* source_gather_interval is the address adjustment at gather boundary
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* dest_address is block starting address at destination
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* dest_scatter_interval is the address adjustment at scatter boundary
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* dest_scatter_count is the continuous transfer count between scatter
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* boundaries
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* source_gather_count is the continuous transfer count between gather
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* boundaries
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* block_size is the number of bytes to be transferred for this block.
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*
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* config is a bit field with the following parts:
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* source_gather_en [ 0 ] - 0-disable, 1-enable
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* dest_scatter_en [ 1 ] - 0-disable, 1-enable
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* source_addr_adj [ 2 : 3 ] - 00-increment, 01-decrement,
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* 10-no change
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* dest_addr_adj [ 4 : 5 ] - 00-increment, 01-decrement,
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* 10-no change
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* source_reload_en [ 6 ] - reload source address at the end of
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* block transfer
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* 0-disable, 1-enable
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* dest_reload_en [ 7 ] - reload destination address at the end
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* of block transfer
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* 0-disable, 1-enable
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* fifo_mode_control [ 8 : 11 ] - How full of the fifo before transfer
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* start. HW specific.
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* flow_control_mode [ 12 ] - 0-source request served upon data
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* availability
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* 1-source request postphoned until
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* destination request happens
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* reserved [ 13 : 15 ]
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*/
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struct dma_block_config {
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uint32_t source_address;
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uint32_t source_gather_interval;
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uint32_t dest_address;
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uint32_t dest_scatter_interval;
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uint16_t dest_scatter_count;
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uint16_t source_gather_count;
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uint32_t block_size;
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struct dma_block_config *next_block;
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uint16_t source_gather_en : 1;
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uint16_t dest_scatter_en : 1;
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uint16_t source_addr_adj : 2;
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uint16_t dest_addr_adj : 2;
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uint16_t source_reload_en : 1;
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uint16_t dest_reload_en : 1;
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uint16_t fifo_mode_control : 4;
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uint16_t flow_control_mode : 1;
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uint16_t reserved : 3;
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};
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/**
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* @brief DMA configuration structure.
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*
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* config is a bit field with the following parts:
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* dma_slot [ 0 : 5 ] - which peripheral and direction
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* (HW specific)
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* channel_direction [ 6 : 8 ] - 000-memory to memory, 001-memory to
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* peripheral, 010-peripheral to memory,
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* ...
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* complete_callback_en [ 9 ] - 0-callback invoked at completion only
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* 1-callback invoked at completion of
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* each block
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* error_callback_en [ 10 ] - 0-error callback enabled
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* 1-error callback disabled
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* source_handshake [ 11 ] - 0-HW, 1-SW
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* dest_handshake [ 12 ] - 0-HW, 1-SW
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* channel_priority [ 13 : 16 ] - DMA channel priority
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* source_chaining_en [ 17 ] - enable/disable source block chaining
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* 0-disable, 1-enable
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* dest_chaining_en [ 18 ] - enable/disable destination block
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* chaining.
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* 0-disable, 1-enable
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* reserved [ 19 : 31 ]
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*
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* config_size is a bit field with the following parts:
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* source_data_size [ 0 : 15 ] - number of bytes
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* dest_data_size [ 16 : 31 ] - number of bytes
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* source_burst_length [ 0 : 15 ] - number of source data units
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* dest_burst_length [ 16 : 31 ] - number of destination data units
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*
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* block_count is the number of blocks used for block chaining, this
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* depends on availability of the DMA controller.
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*
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* dma_callback is the callback function pointer. If enabled, callback function
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* will be invoked at transfer completion or when error happens
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* (error_code: zero-transfer success, non zero-error happens).
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*/
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struct dma_config {
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uint32_t dma_slot : 6;
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uint32_t channel_direction : 3;
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uint32_t complete_callback_en : 1;
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uint32_t error_callback_en : 1;
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uint32_t source_handshake : 1;
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uint32_t dest_handshake : 1;
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uint32_t channel_priority : 4;
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uint32_t source_chaining_en : 1;
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uint32_t dest_chaining_en : 1;
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uint32_t reserved : 13;
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uint32_t source_data_size : 16;
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uint32_t dest_data_size : 16;
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uint32_t source_burst_length : 16;
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uint32_t dest_burst_length : 16;
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uint32_t block_count;
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struct dma_block_config *head_block;
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void (*dma_callback)(struct device *dev, uint32_t channel,
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int error_code);
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};
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/**
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* @cond INTERNAL_HIDDEN
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*
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* These are for internal use only, so skip these in
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* public documentation.
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*/
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typedef int (*dma_api_channel_config)(struct device *dev, uint32_t channel,
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struct dma_channel_config *config);
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typedef int (*dma_api_transfer_config)(struct device *dev, uint32_t channel,
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struct dma_transfer_config *config);
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typedef int (*dma_api_transfer_start)(struct device *dev, uint32_t channel);
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typedef int (*dma_api_transfer_stop)(struct device *dev, uint32_t channel);
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typedef int (*dma_api_config)(struct device *dev, uint32_t channel,
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struct dma_config *config);
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typedef int (*dma_api_start)(struct device *dev, uint32_t channel);
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typedef int (*dma_api_stop)(struct device *dev, uint32_t channel);
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struct dma_driver_api {
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dma_api_channel_config channel_config;
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dma_api_transfer_config transfer_config;
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dma_api_transfer_start transfer_start;
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dma_api_transfer_stop transfer_stop;
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dma_api_config config;
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dma_api_start start;
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dma_api_stop stop;
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};
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/**
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* @endcond
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*/
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/**
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* @brief Configure individual channel for DMA transfer.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to configure
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* @param config Data structure containing the intended configuration for the
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* selected channel
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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static inline int dma_config(struct device *dev, uint32_t channel,
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struct dma_config *config)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->config(dev, channel, config);
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}
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/**
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* @brief Enables DMA channel and starts the transfer, the channel must be
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* configured beforehand.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer will
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* be processed
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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static inline int dma_start(struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->start(dev, channel);
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}
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/**
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* @brief Stops the DMA transfer and disables the channel.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer was
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* being processed
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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static inline int dma_stop(struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->stop(dev, channel);
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}
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/**
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* @brief Configure individual channel for DMA transfer.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to configure
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* @param config Data structure containing the intended configuration for the
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* selected channel
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*
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* @retval 0 If successful.
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* @retval Negative errno code if failure.
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*/
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static inline int __deprecated dma_channel_config(struct device *dev,
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uint32_t channel, struct dma_channel_config *config)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->channel_config(dev, channel, config);
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}
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/**
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* @brief Configure DMA transfer for a specific channel that has been
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* configured.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to configure
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* @param config Data structure containing transfer configuration for the
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* selected channel
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*
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* @retval 0 If successful.
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* @retval Negative errno code if failure.
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*/
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static inline int __deprecated dma_transfer_config(struct device *dev,
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uint32_t channel, struct dma_transfer_config *config)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->transfer_config(dev, channel, config);
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}
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/**
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* @brief Enables DMA channel and starts the transfer, the channel must be
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* configured beforehand.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer will
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* be processed
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*
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* @retval 0 If successful.
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* @retval Negative errno code if failure.
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*/
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static inline int __deprecated dma_transfer_start(struct device *dev,
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uint32_t channel)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->transfer_start(dev, channel);
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}
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/**
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* @brief Stops the DMA transfer and disables the channel.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer was
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* being processed
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*
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* @retval 0 If successful.
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* @retval Negative errno code if failure.
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*/
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static inline int __deprecated dma_transfer_stop(struct device *dev,
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uint32_t channel)
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{
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const struct dma_driver_api *api = dev->driver_api;
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return api->transfer_stop(dev, channel);
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}
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DMA_H_ */
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