Gil Pitney 1a5537811f cc32xx: Redefine CMSIS IRQn_Type enum to unsigned int ... Previously, calling NVIC_SetPriority(IRQn_Type irqn, ....) with the NWP interrupt number of 171 caused a hard fault during a subsequent svc #0 instruction during _Swap(). GNU compiler is generating a bit extension instruction (sxtb) which converts a positive IRQ value argument to a negative value when casting to the CMSIS IRQn_Type enum parameter type. This generates a negative index, which then writes to an SCB control register instead of NVIC register, causing a hard fault later on. This issue only occurs when passing interrupt numbers > 0x80 (eg: 171 (0xab) for the NWP) to the CMSIS NVIC apis. The solution here is simply to redefine IRQn_Type to be an unsigned 32 bit integer, while redefining the CMSIS IRQn_Type enum definitions for interrupts less than zero. Jira: ZEP-1958 Signed-off-by: Gil Pitney <gil.pitney@linaro.org>		2017-08-10 16:46:49 -05:00
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arc	arch: arc: add nested interrupt support	2017-08-10 12:47:15 -04:00
arm	cc32xx: Redefine CMSIS IRQn_Type enum to unsigned int	2017-08-10 16:46:49 -05:00
common	arch: xtensa: Convert Xtensa port to use gen_isr_table	2017-08-09 12:26:14 -07:00
nios2
riscv32
x86
xtensa	arch: xtensa: Move exception table to xtensa_intr.c	2017-08-09 12:26:14 -07:00
Kconfig
Makefile