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Originally, x86 just supported APIC. Then later support for the Mint Valley Interrupt Controller was added. This controller is mostly similar to the APIC with some differences, but was integrated in a somewhat hacked-up fashion. Now we define irq_controller.h, which is a layer of abstraction between the core arch code and the interrupt controller implementation. Contents of the API: - Controllers with a fixed irq-to-vector mapping define _IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time map between the two. - _irq_controller_program() notifies the interrupt controller what vector will be used for a particular IRQ along with triggering flags - _irq_controller_isr_vector_get() reports the vector number of the IRQ currently being serviced - In assembly language domain, _irq_controller_eoi implements EOI handling. - Since triggering options can vary, some common defines for triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH, IRQ_POLARITY_LOW introduced. Specific changes made: - New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers that have a fixed relationship between IRQ lines and IDT vectors. - MVIC driver rewritten per the HAS instead of the tortuous methods used to get it to behave like LOAPIC. We are no longer writing values to reserved registers. Additional assertions added. - Some cleanup in the loapic_timer driver to make the MVIC differences clearer. - Unused APIs removed, or folded into calling code when used just once. - MVIC doesn't bother to write a -1 to the intList priority field since it gets ignored anyway Issue: ZEP-48 Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __INC_SYS_APIC_H
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#define __INC_SYS_APIC_H
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#include <drivers/ioapic.h>
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#include <drivers/loapic.h>
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#define _IRQ_TRIGGER_EDGE IOAPIC_EDGE
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#define _IRQ_TRIGGER_LEVEL IOAPIC_LEVEL
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#define _IRQ_POLARITY_HIGH IOAPIC_HIGH
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#define _IRQ_POLARITY_LOW IOAPIC_LOW
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#ifndef _ASMLANGUAGE
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#define LOAPIC_IRQ_BASE CONFIG_IOAPIC_NUM_RTES
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#define LOAPIC_IRQ_COUNT 6 /* Default to LOAPIC_TIMER to LOAPIC_ERROR */
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/* irq_controller.h interface */
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void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
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uint32_t flags);
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int __irq_controller_isr_vector_get(void);
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#else /* _ASMLANGUAGE */
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#if CONFIG_EOI_FORWARDING_BUG
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.macro __irq_controller_eoi
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call _lakemont_eoi
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.endm
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#else
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.macro __irq_controller_eoi
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xorl %eax, %eax /* zeroes eax */
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loapic_eoi_reg = (CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_EOI)
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movl %eax, loapic_eoi_reg /* tell LOAPIC the IRQ is handled */
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.endm
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#endif /* CONFIG_EOI_FORMWARDING_BUG */
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#endif /* _ASMLANGUAGE */
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#endif /* __INC_SYS_APIC_H */
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