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https://github.com/zephyrproject-rtos/zephyr
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502094b096
The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
33 lines
664 B
C
33 lines
664 B
C
/*
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* Copyright (c) 2018-2019 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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#if defined(CONFIG_GPIO_MMIO32)
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/* USERLED0 */
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#define LED0_GPIO_PORT FPGAIO_LED0_GPIO_NAME
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#define LED0_GPIO_PIN FPGAIO_LED0_USERLED0
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/* USERLED1 */
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#define LED1_GPIO_PORT FPGAIO_LED0_GPIO_NAME
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#define LED1_GPIO_PIN FPGAIO_LED0_USERLED1
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/* USERPB0 */
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#define SW0_GPIO_NAME FPGAIO_BUTTON_GPIO_NAME
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#define SW0_GPIO_PIN FPGAIO_BUTTON_USERPB0
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/* USERPB1 */
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#define SW1_GPIO_NAME FPGAIO_BUTTON_GPIO_NAME
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#define SW1_GPIO_PIN FPGAIO_BUTTON_USERPB1
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#endif /* CONFIG_GPIO_MMIO32 */
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#endif /* __INC_BOARD_H */
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