mirror of
https://github.com/zephyrproject-rtos/zephyr
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43592b1127
GDB server needs ownership of some exceptions to display information when taking a fatal exception (DIVIDE_ERROR, PAGE_FAULT). Introduce a Kconfig option that can work for any debugger. Change-Id: I39aef22a820543a7fe9ac333b487592946abc0f3 Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
461 lines
12 KiB
ArmAsm
461 lines
12 KiB
ArmAsm
/*
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* Copyright (c) 2011-2015 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Exception management support for IA-32 architecture
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*
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* This module implements assembly routines to manage exceptions (synchronous
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* interrupts) on the Intel IA-32 architecture. More specifically,
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* exceptions are implemented in this module. The stubs are invoked when entering
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* and exiting a C exception handler.
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*/
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#define _ASMLANGUAGE
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#include <nano_private.h>
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#include <arch/x86/asm.h>
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#include <arch/x86/arch.h> /* For MK_ISR_NAME */
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#include <offsets.h> /* nanokernel structure offset definitions */
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#include <asmPrv.h>
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/* exports (internal APIs) */
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GTEXT(_ExcEnt)
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GTEXT(_ExcEntNoErr)
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GTEXT(_ExcExit)
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GTEXT(_DynExcStubsBegin)
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GTEXT(_DynExcStubsNoErrBegin)
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/* externs (internal APIs) */
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/**
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*
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* @brief Inform the kernel of an exception with no error code
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*
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* This is very similar to _ExcEnt() but the stack is first massaged
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* so that a dummy error code is inserted.
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*/
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SECTION_FUNC(TEXT, _ExcEntNoErr)
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/* Clear direction flag, auto-restored when the exception exits */
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cld
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/* Stash current value of ECX to free up the register */
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pushl %ecx
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/* Save the return address of the stub into ECX */
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movl 4(%esp), %ecx
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/*
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* The spot for the error code contains useless data, but
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* we don't particularly care since it will be unused.
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*/
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jmp _ExcEntSetupDone
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/**
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*
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* @brief Inform the kernel of an exception
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*
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* This function is called from the exception stub created by nanoCpuExcConnect()
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* to inform the kernel of an exception. This routine currently does
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* _not_ increment a thread/interrupt specific exception count. Also,
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* execution of the exception handler occurs on the current stack, i.e.
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* _ExcEnt() does not switch to another stack. The volatile integer
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* registers are saved on the stack, and control is returned back to the
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* exception stub.
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*
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* WARNINGS
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*
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* Host-based tools and the target-based GDB agent depend on the stack frame
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* created by this routine to determine the locations of volatile registers.
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* These tools must be updated to reflect any changes to the stack frame.
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*
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* @return N/A
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*
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* C function prototype:
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*
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* void _ExcEnt (void);
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*
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*/
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SECTION_FUNC(TEXT, _ExcEnt)
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/*
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* The _IntVecSet() routine creates an interrupt-gate descriptor for
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* all connections. The processor will automatically clear the IF
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* bit in the EFLAGS register upon execution of the handler, thus
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* _ExcEnt() (and _IntEnt) need not issue an 'cli' as the first
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* instruction.
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*/
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/*
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* Note that the processor has pushed both the EFLAGS register
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* and the linear return address (cs:eip) onto the stack prior
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* to invoking the handler specified in the IDT.
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*
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* Clear the direction flag. It is automatically restored when the
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* exception exits.
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*/
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cld
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/*
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* Swap ecx and return address on the current stack;
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* this saves ecx on the stack without losing knowledge
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* of how to get back to the exception stub.
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*/
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xchgl %ecx, (%esp)
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BRANCH_LABEL(_ExcEntSetupDone)
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/* By the time we get here, the stack should look like this:
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* ESP -> ECX (excepting task)
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* Exception Error code (or junk)
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* EIP (excepting task)
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* CS (excepting task)
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* EFLAGS (excepting task)
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* ...
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*
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* ECX now contains the EIP of the calling exception stub */
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/*
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* Push the remaining volatile registers on the existing stack.
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*/
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pushl %eax
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pushl %edx
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/*
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* Push the cooperative registers on the existing stack as they are
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* required by debug tools.
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*/
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pushl %edi
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pushl %esi
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pushl %ebx
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pushl %ebp
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leal 44(%esp), %eax /* Calculate ESP before interrupt occurred */
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pushl %eax /* Save calculated ESP */
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/* ESP is pointing to the ESF at this point */
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#if defined(CONFIG_FP_SHARING) || defined(CONFIG_GDB_INFO)
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movl _nanokernel + __tNANO_current_OFFSET, %ecx
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incl __tTCS_excNestCount_OFFSET(%ecx) /* inc exception nest count */
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#ifdef CONFIG_GDB_INFO
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/*
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* Save the pointer to the stack frame (NANO_ESF *) in
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* the current execution context if this is the outermost exception.
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* The ESF pointer is used by debug tools to locate the volatile
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* registers and the stack of the preempted thread.
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*/
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testl $EXC_ACTIVE, __tTCS_flags_OFFSET (%ecx)
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jne alreadyInException
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movl %esp, __tTCS_esfPtr_OFFSET(%ecx)
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BRANCH_LABEL(alreadyInException)
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#endif /* CONFIG_GDB_INFO */
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/*
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* Set the EXC_ACTIVE bit in the TCS of the current thread.
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* This enables _Swap() to preserve the thread's FP registers
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* (where needed) if the exception handler causes a context switch.
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* It also indicates to debug tools that an exception is being
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* handled in the event of a context switch.
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*/
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orl $EXC_ACTIVE, __tTCS_flags_OFFSET(%ecx)
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#endif /* CONFIG_FP_SHARING || CONFIG_GDB_INFO */
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/*
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* restore interrupt enable state, then "return" back to exception stub
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*
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* interrupts are enabled only if they were allowed at the time
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* the exception was triggered -- this protects kernel level code
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* that mustn't be interrupted
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*
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* Test IF bit of saved EFLAGS and re-enable interrupts if IF=1.
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*/
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/* ESP is still pointing to the ESF at this point */
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testl $0x200, __NANO_ESF_eflags_OFFSET(%esp)
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je allDone
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sti
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BRANCH_LABEL(allDone)
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#if CONFIG_X86_IAMCU
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movl %esp, %eax /* NANO_ESF * parameter */
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#else
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pushl %esp /* push NANO_ESF * parameter */
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#endif
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jmp *%ecx /* "return" back to stub */
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/**
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*
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* @brief Inform the kernel of an exception exit
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*
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* This function is called from the exception stub created by nanoCpuExcConnect()
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* to inform the kernel that the processing of an exception has
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* completed. This routine restores the volatile integer registers and
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* then control is returned back to the interrupted thread or ISR.
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*
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* @return N/A
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*
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* C function prototype:
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*
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* void _ExcExit (void);
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*
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*/
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SECTION_FUNC(TEXT, _ExcExit)
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/* On entry, interrupts may or may not be enabled. */
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#ifndef CONFIG_X86_IAMCU
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popl %ecx /* discard the NANO_ESF * parameter */
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#endif
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#if defined(CONFIG_FP_SHARING) || defined(CONFIG_GDB_INFO)
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movl _nanokernel + __tNANO_current_OFFSET, %ecx
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/*
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* Must lock interrupts to prevent outside interference.
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* (Using "lock" prefix would be nicer, but this won't work
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* on platforms that don't respect the CPU's bus lock signal.)
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*/
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cli
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/*
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* Determine whether exiting from a nested interrupt.
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*/
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decl __tTCS_excNestCount_OFFSET(%ecx) /* dec exception nest count */
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cmpl $0, __tTCS_excNestCount_OFFSET(%ecx)
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jne nestedException
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/*
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* Clear the EXC_ACTIVE bit in the tTCS of the current execution context
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* if we are not in a nested exception (ie, when we exit the outermost
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* exception).
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*/
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andl $~EXC_ACTIVE, __tTCS_flags_OFFSET (%ecx)
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BRANCH_LABEL(nestedException)
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#endif /* CONFIG_FP_SHARING || CONFIG_GDB_INFO */
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/*
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* Pop the non-volatile registers from the stack.
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* Note that debug tools may have altered the saved register values while
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* the task was stopped, and we want to pick up the altered values.
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*/
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popl %ebp /* Discard saved ESP */
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popl %ebp
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popl %ebx
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popl %esi
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popl %edi
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/* restore edx and ecx which are always saved on the stack */
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popl %edx
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popl %eax
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popl %ecx
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addl $4, %esp /* "pop" error code */
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/* Pop of EFLAGS will re-enable interrupts and restore direction flag */
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iret
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/* Static exception handler stubs */
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#if CONFIG_FP_SHARING
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SYS_NANO_CPU_EXC_CONNECT(_FpNotAvailableExcHandler,IV_DEVICE_NOT_AVAILABLE)
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#endif /* CONFIG_FP_SHARING */
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#if CONFIG_EXCEPTION_DEBUG
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#define EXC_HANDLER(vec) NANO_CPU_EXC_CONNECT_NO_ERR(handle_exc_##vec, vec, 0)
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#define EXC_HANDLER_CODE(vec) NANO_CPU_EXC_CONNECT(handle_exc_##vec, vec, 0)
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#if !defined(CONFIG_DEBUGGER_OWNS_FATAL_PROG_EXC_HANDLERS)
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EXC_HANDLER(IV_DIVIDE_ERROR)
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EXC_HANDLER_CODE(IV_PAGE_FAULT)
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#endif
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EXC_HANDLER(IV_NON_MASKABLE_INTERRUPT)
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EXC_HANDLER(IV_OVERFLOW)
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EXC_HANDLER(IV_BOUND_RANGE)
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EXC_HANDLER(IV_INVALID_OPCODE)
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#ifndef CONFIG_FP_SHARING
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EXC_HANDLER(IV_DEVICE_NOT_AVAILABLE)
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#endif
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EXC_HANDLER_CODE(IV_DOUBLE_FAULT)
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EXC_HANDLER_CODE(IV_INVALID_TSS)
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EXC_HANDLER_CODE(IV_SEGMENT_NOT_PRESENT)
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EXC_HANDLER_CODE(IV_STACK_FAULT)
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EXC_HANDLER_CODE(IV_GENERAL_PROTECTION)
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EXC_HANDLER(IV_X87_FPU_FP_ERROR)
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EXC_HANDLER_CODE(IV_ALIGNMENT_CHECK)
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EXC_HANDLER(IV_MACHINE_CHECK)
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#endif /* CONFIG_EXCEPTION_DEBUG */
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#if ALL_DYN_EXC_STUBS > 0
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BRANCH_LABEL(_DynExcStubCommon)
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call _common_dynamic_exc_handler
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#ifndef CONFIG_X86_IAMCU
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/* Cleanse the stack of stub_num */
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pop %eax
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#endif
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/* Clean up and call IRET */
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jmp _ExcExit
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/*
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* Create nice labels for all the stubs so we can see where we
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* are in a debugger
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*/
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.altmacro
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.macro __EXC_STUB_NUM id
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BRANCH_LABEL(_DynExcStub\id)
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.endm
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.macro EXC_STUB_NUM id
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__EXC_STUB_NUM %id
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.endm
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stub_num = 0
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SECTION_FUNC(TEXT, _DynExcStubsBegin)
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#if CONFIG_NUM_DYNAMIC_EXC_STUBS > 0
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/* Create all the dynamic IRQ stubs
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*
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* NOTE: Please update DYN_STUB_SIZE in include/arch/x86/arch.h if you change
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* how large the generated stubs are, otherwise _get_dynamic_stub() will
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* be unable to correctly determine the offset
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*/
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.rept ((CONFIG_NUM_DYNAMIC_EXC_STUBS + DYN_STUB_PER_BLOCK - 1) / DYN_STUB_PER_BLOCK)
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block_counter = 0
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.rept DYN_STUB_PER_BLOCK
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.if stub_num < CONFIG_NUM_DYNAMIC_EXC_STUBS
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EXC_STUB_NUM stub_num
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/*
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* TODO: make this call in _DynExcStubCommon, saving
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* 5 bytes per stub. Some voodoo will be necessary
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* in _ExcEnt/_ExcExit to transplant the pushed
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* stub_num to the irq stack
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*/
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call _ExcEnt
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#if CONFIG_X86_IAMCU
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movl $stub_num, %edx
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#else
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/*
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* 2-byte push imm8. Consumed by
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* _common_dynamic_exc_handler(), see excconnect.c
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*/
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push $stub_num
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#endif
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/*
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* Check to make sure this isn't the last stub in
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* a block, in which case we just fall through
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*/
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.if (block_counter <> (DYN_STUB_PER_BLOCK - 1) && \
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(stub_num <> CONFIG_NUM_DYNAMIC_EXC_STUBS - 1))
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/* This should always be a 2-byte jmp rel8 */
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jmp 1f
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.endif
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stub_num = stub_num + 1
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block_counter = block_counter + 1
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.endif
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.endr
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/*
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* This must a 5-bvte jump rel32, which is why _DynStubCommon
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* is before the actual stubs
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*/
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1: jmp _DynExcStubCommon
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.endr
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#endif
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SECTION_FUNC(TEXT, _DynExcStubsNoErrBegin)
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#if CONFIG_NUM_DYNAMIC_EXC_NOERR_STUBS > 0
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/* Same as above, but these stubs push a dummy error code as they will be
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* associated with exception that don't push one of their own.
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* Note that we don't reset stub_num to 0, we have a single set of indices
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* for error/non-error stubs */
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.rept ((CONFIG_NUM_DYNAMIC_EXC_NOERR_STUBS + DYN_STUB_PER_BLOCK - 1) / DYN_STUB_PER_BLOCK)
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block_counter = 0
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.rept DYN_STUB_PER_BLOCK
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.if stub_num < ALL_DYN_EXC_STUBS
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EXC_STUB_NUM stub_num
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/*
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* TODO: make this call in _DynExcStubCommon, saving
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* 5 bytes per stub. Some voodoo will be necessary
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* in _ExcEnt/_ExcExit to transplant the pushed
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* stub_num to the irq stack
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*/
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call _ExcEntNoErr
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#if CONFIG_X86_IAMCU
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movl $stub_num, %edx
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#else
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/*
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* 2-byte push imm8. Consumed by
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* _common_dynamic_exc_handler(), see excconnect.c
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*/
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push $stub_num
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#endif
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/*
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* Check to make sure this isn't the last stub in
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* a block, in which case we just fall through
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*/
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.if (block_counter <> (DYN_STUB_PER_BLOCK - 1) && \
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(stub_num <> ALL_DYN_EXC_STUBS - 1))
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/* This should always be a 2-byte jmp rel8 */
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jmp 1f
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.endif
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stub_num = stub_num + 1
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block_counter = block_counter + 1
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.endif
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.endr
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/*
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* This must a 5-bvte jump rel32, which is why _DynStubCommon
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* is before the actual stubs
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*/
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1: jmp _DynExcStubCommon
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.endr
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#endif /* CONFIG_NUM_DYNAMIC_EXC_NOERR_STUBS */
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#endif /* ALL_DYN_EXC_STUBS */
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