mirror of
https://github.com/zephyrproject-rtos/zephyr
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Comparing the output of "west boards" with mentions of boards in build instructions (:board: boardname) found a couple of incorrect board references. Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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296 lines
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.. _stm32mp157c_dk2_board:
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ST STM32MP157C-DK2 Discovery
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############################
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Overview
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********
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The STM32MP157-DK2 Discovery board leverages the capacities of the STM32MP157
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multi-core processor,composed of a dual Cortex®-A7 and a single Cortex®-M4 core.
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Zephyr OS is ported to run on the Cortex®-M4 core.
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- Common features:
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- STM32MP157:
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- Arm®-based dual Cortex®-A7 32 bits
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- Cortex®-M4 32 bits
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- embedded SRAM (448 Kbytes) for Cortex®-M4.
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- ST PMIC STPMIC1A
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- 4-Gbit DDR3L, 16 bits, 533 MHz
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- 1-Gbps Ethernet (RGMII) compliant with IEEE-802.3ab
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- USB OTG HS
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- Audio CODEC, with a stereo headset jack, including analog microphone input
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- 4 user LEDs
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- 2 user and reset push-buttons, 1 wake-up button
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- 5 V / 3 A USB Type-CTM power supply input (not provided)
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- Board connectors:
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- Ethernet RJ45
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- 4 USB Host Type-A
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- USB Type-C
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- DRP MIPI DSI HDMI
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- Stereo headset jack including analog microphone input
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- microSD card
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- GPIO expansion connector (Raspberry Pi® shields capability)
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- ArduinoTM Uno V3 expansion connectors
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- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
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capability: Virtual COM port and debug port
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- Board-specific features:
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- 4" TFT 480×800 pixels with LED backlight, MIPI DSI interface, and capacitive
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touch panel
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- Wi-Fi® 802.11b/g/n
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- Bluetooth® Low Energy 4.1
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.. image:: img/en.stm32mp157c-dk2.jpg
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:width: 600px
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:align: center
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:height: 526px
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:alt: STM32MP157C-DK2 Discovery
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More information about the board can be found at the
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`STM32P157C Discovery website`_.
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Hardware
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********
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The STM32MP157 SoC provides the following hardware capabilities:
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- Core:
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- 32-bit dual-core Arm® Cortex®-A7
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- L1 32-Kbyte I / 32-Kbyte D for each core
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- 256-Kbyte unified level 2 cache
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- Arm® NEON™ and Arm® TrustZone®
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- 32-bit Arm® Cortex®-M4 with FPU/MPU
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- Up to 209 MHz (Up to 703 CoreMark®)
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- Memories:
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- External DDR memory up to 1 Gbyte.
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- 708 Kbytes of internal SRAM: 256 KB of AXI SYSRAM + 384 KB of AHB SRAM +
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64 KB of AHB SRAM in backup domain.
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- Dual mode Quad-SPI memory interface
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- Flexible external memory controller with up to 16-bit data bus
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- Security/safety:
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- Secure boot, TrustZone® peripherals with Cortex®-M4 resources isolation
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- Clock management:
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- Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz
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LSI oscillator
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- External oscillators: 8-48 MHz HSE oscillator, 32.768 kHz LSE oscillator
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- 6 × PLLs with fractional mode
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- General-purpose input/outputs:
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- Up to 176 I/O ports with interrupt capability
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- Interconnect matrix
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- 3 DMA controllers
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- Communication peripherals:
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- 6 × I2C FM+ (1 Mbit/s, SMBus/PMBus)
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- 4 × UART + 4 × USART (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, SPI slave)
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- 6 × SPI (50 Mbit/s, including 3 with full duplex I2S audio class accuracy)
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- 4 × SAI (stereo audio: I2S, PDM, SPDIF Tx)
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- SPDIF Rx with 4 inputs
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- HDMI-CEC interface
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- MDIO Slave interface
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- 3 × SDMMC up to 8-bit (SD / e•MMC™ / SDIO)
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- 2 × CAN controllers supporting CAN FD protocol, TTCAN capability
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- 2 × USB 2.0 high-speed Host+ 1 × USB 2.0 full-speed OTG simultaneously
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- 10/100M or Gigabit Ethernet GMAC (IEEE 1588v2 hardware, MII/RMII/GMII/RGMI)
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- 8- to 14-bit camera interface up to 140 Mbyte/s
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- 6 analog peripherals
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- 2 × ADCs with 16-bit max. resolution.
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- 1 × temperature sensor
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- 2 × 12-bit D/A converters (1 MHz)
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- 1 × digital filters for sigma delta modulator (DFSDM) with 8 channels/6
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filters
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- Internal or external ADC/DAC reference VREF+
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- Graphics:
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- 3D GPU: Vivante® - OpenGL® ES 2.0
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- LCD-TFT controller, up to 24-bit // RGB888, up to WXGA (1366 × 768) @60 fps
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- MIPI® DSI 2 data lanes up to 1 GHz each
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- Timers:
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- 2 × 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature
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(incremental) encoder input
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- 2 × 16-bit advanced motor control timers
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- 10 × 16-bit general-purpose timers (including 2 basic timers without PWM)
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- 5 × 16-bit low-power timers
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- RTC with sub-second accuracy and hardware calendar
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- 2 × 4 Cortex®-A7 system timers (secure, non-secure, virtual, hypervisor)
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- 1 × SysTick Cortex®-M4 timer
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- Hardware acceleration:
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- AES 128, 192, 256, TDES
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- HASH (MD5, SHA-1, SHA224, SHA256), HMAC
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- 2 × true random number generator (3 oscillators each)
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- 2 × CRC calculation unit
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- Debug mode:
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- Arm® CoreSight™ trace and debug: SWD and JTAG interfaces
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- 8-Kbyte embedded trace buffer
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- 3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user
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More information about STM32P157C can be found here:
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- `STM32MP157C on www.st.com`_
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- `STM32MP157C reference manual`_
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Supported Features
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==================
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The Zephyr stm32mp157c_dk2 board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/stm32mp157c_dk2/stm32mp157c_dk2_defconfig``
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Connections and IOs
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===================
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STM32MP157C-DK2 Discovery Board schematic is available here:
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`STM32MP157C Discovery board schematics`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- USART_3 TX/RX : PB10/PB12 (UART console)
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- UART_7 TX/RX : PE8/PE7 (Arduino Serial)
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- I2C5 SCL/SDA : PA11/PA12 (Arduino I2C)
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- SPI4 SCK/MISO/MOSI : PE12/PE13/PE14 (Arduino SPI)
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- SPI5 SCK/MISO/MOSI : PF7/PF8/PF9
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System Clock
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------------
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The Cortex®-M4 Core is configured to run at a 209 MHz clock speed. This value
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must match the configured mlhclk_ck frequency.
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Serial Port
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-----------
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The STM32MP157C-DK2 Discovery board has 8 U(S)ARTs.
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The Zephyr console output is assigned by default to the RAM console to be dumped
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by the Linux Remoteproc Framework on Cortex®-A7 core. In order to keep the UART7
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free for future serial interactions with Arduino shield, the Zephyr UART console
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output is USART3 and is disabled by default. UART console can be enable through
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board's devicetree and stm32mp157c_dk2_defconfig board file (or prj.conf
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project files), and will disable existing RAM console output. Default UART
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console settings are 115200 8N1.
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Programming and Debugging
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*************************
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The STM32MP157C doesn't have QSPI flash for the Cortex®-M4 and it needs to be
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started by the Cortex®-A7 core. The Cortex®-A7 core is responsible to load the
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Cortex®-M4 binary application into the RAM, and get the Cortex®-M4 out of reset.
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The Cortex®-A7 can perform these steps at bootloader level or after the Linux
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system has booted.
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The Cortex®-M4 can use up to 2 different RAMs. The program pointer starts at
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address 0x00000000 (RETRAM), the vector table should be loaded at this address
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These are the memory mappings for Cortex®-A7 and Cortex®-M4:
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+------------+-----------------------+------------------------+----------------+
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| Region | Cortex®-A7 | Cortex®-M4 | Size |
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+============+=======================+========================+================+
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| RETRAM | 0x38000000-0x3800FFFF | 0x00000000-0x0000FFFF | 64KB |
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+------------+-----------------------+------------------------+----------------+
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| MCUSRAM | 0x10000000-0x1005FFFF | 0x10000000-0x1005FFFF | 384KB |
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+------------+-----------------------+------------------------+----------------+
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| DDR | 0xC0000000-0xFFFFFFFF | | up to 1 GB |
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+------------+-----------------------+------------------------+----------------+
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Refer to `stm32mp157c boot Cortex-M4 firmware`_ wiki page for instruction
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to load and start the Cortex-M4 firmware.
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Debugging
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=========
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You can debug an application using OpenOCD and GDB. The Solution proposed below
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is based on the Linux STM32MP1 SDK OpenOCD and is available only for a Linux
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environment. The firmware must first be loaded by the Cortex®-A7. Developer
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then attaches the debugger to the running Zephyr using OpenOCD.
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Prerequisite
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------------
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install `stm32mp1 developer package`_.
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1) start OpenOCD in a dedicated terminal
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- Start up the sdk environment::
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source <SDK installation directory>/environment-setup-cortexa7hf-neon-vfpv4-openstlinux_weston-linux-gnueabi
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- Start OpenOCD::
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${OECORE_NATIVE_SYSROOT}/usr/bin/openocd -s ${OECORE_NATIVE_SYSROOT}/usr/share/openocd/scripts -f board/stm32mp15x_dk2.cfg
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2) run gdb in Zephyr environment
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: stm32mp157c_dk2
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:goals: debug
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.. _STM32P157C Discovery website:
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https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157c-dk2.html
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.. _STM32MP157C Discovery board User Manual:
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https://www.st.com/resource/en/user_manual/dm00591354.pdf
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.. _STM32MP157C Discovery board schematics:
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https://www.st.com/resource/en/schematic_pack/mb1272-dk2-c01_schematic.pdf
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.. _STM32MP157C on www.st.com:
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https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus/stm32mp1-series/stm32mp157/stm32mp157c.html
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.. _STM32MP157C reference manual:
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https://www.st.com/resource/en/reference_manual/DM00327659.pdf
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.. _stm32mp1 developer package:
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https://wiki.st.com/stm32mpu/index.php/STM32MP1_Developer_Package#Installing_the_SDK
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.. _stm32mp157c boot Cortex-M4 firmware:
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https://wiki.st.com/stm32mpu/index.php/Linux_remoteproc_framework_overview#How_to_use_the_framework
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