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4ada2f65d2
If it is such a thing (a CAVT intc), it will not be targeting Intel s1000 SoC only. UP squarde ADSP use the same intc. So renaming it to CAVS. Though CAVS name might be wrong (CAVS being an overall architecture name, and not an IP block specification). Reducing the amount of lines by using if/endif as well. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
60 lines
1.3 KiB
Plaintext
60 lines
1.3 KiB
Plaintext
# CAVS interrupt controller configuration
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# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config CAVS_ICTL
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bool "CAVS Interrupt Logic"
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depends on MULTI_LEVEL_INTERRUPTS
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help
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These are 4 in number supporting a max of 32 interrupts each.
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if CAVS_ICTL
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config CAVS_ISR_TBL_OFFSET
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int "Offset in the SW ISR Table"
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default 0
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help
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This indicates the offset in the SW_ISR_TABLE beginning from where
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the ISRs for CAVS Interrupt Controller are assigned.
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config CAVS_ICTL_0_NAME
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string "CAVS 0 Driver name"
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default "CAVS_0"
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config CAVS_ICTL_0_OFFSET
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int "Parent interrupt number to which CAVS_0 maps"
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default 0
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config CAVS_ICTL_1_NAME
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string "CAVS 1 Driver name"
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default "CAVS_1"
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config CAVS_ICTL_1_OFFSET
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int "Parent interrupt number to which CAVS_1 maps"
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default 0
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config CAVS_ICTL_2_NAME
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string "CAVS 2 Driver name"
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default "CAVS_2"
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config CAVS_ICTL_2_OFFSET
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int "Parent interrupt number to which CAVS_2 maps"
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default 0
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config CAVS_ICTL_3_NAME
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string "CAVS 3 Driver name"
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default "CAVS_3"
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config CAVS_ICTL_3_OFFSET
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int "Parent interrupt number to which CAVS_3 maps"
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default 0
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config CAVS_ICTL_INIT_PRIORITY
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int "CAVS ICTL Init priority"
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default 60
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help
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Cavs Interrupt Logic initialization priority.
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endif # CAVS_ICTL
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