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https://github.com/zephyrproject-rtos/zephyr
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91ceee782f
The current AArch64 interrupt system relies on the multi-level interrupt mechanism and the `irq_nextlevel` public interface to invoke the Generic Interrupt Controller (GIC) driver functions. Since the GIC driver has been refactored to provide a direct interface, in order to resolve various implementation issues described in the GIC driver refactoring commit, the architecture interrupt control functions are updated to directly invoke the GIC driver functions. This commit also adds support for the ARMv8 cores (e.g. Cortex-A53) that allow interfacing to a custom external interrupt controller (i.e. non-GIC) by mapping the architecture interrupt control functions to the SoC layer interrupt control functions when `ARM_CUSTOM_INTERRUPT_CONTROLLER` configuration is enabled. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
62 lines
1.2 KiB
C
62 lines
1.2 KiB
C
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_TIMER_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_TIMER_H_
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#ifndef _ASMLANGUAGE
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#include <drivers/timer/arm_arch_timer.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ARM_ARCH_TIMER_IRQ ARM_TIMER_VIRTUAL_IRQ
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#define CNTV_CTL_ENABLE ((1) << 0)
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static ALWAYS_INLINE void arm_arch_timer_set_compare(u64_t val)
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{
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__asm__ volatile("msr cntv_cval_el0, %0\n\t"
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: : "r" (val) : "memory");
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}
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static ALWAYS_INLINE void arm_arch_timer_enable(unsigned char enable)
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{
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u32_t cntv_ctl;
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__asm__ volatile("mrs %0, cntv_ctl_el0\n\t"
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: "=r" (cntv_ctl) : : "memory");
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if (enable)
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cntv_ctl |= CNTV_CTL_ENABLE;
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else
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cntv_ctl &= ~CNTV_CTL_ENABLE;
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__asm__ volatile("msr cntv_ctl_el0, %0\n\t"
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: : "r" (cntv_ctl) : "memory");
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}
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static ALWAYS_INLINE u64_t arm_arch_timer_count(void)
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{
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u64_t cntvct_el0;
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__asm__ volatile("mrs %0, cntvct_el0\n\t"
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: "=r" (cntvct_el0) : : "memory");
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return cntvct_el0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_TIMER_H_ */
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