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ee7ac70c10
Add the inclusion of the Common Peripheral Access Layer for aarch32 Cortex-A SoCs in combination with the respective SoC's header file, in which the feature flags evaluated in core_ca.h must be provided. The corresponding CMSIS include path is added to the build by setting the HAS_CMSIS_CORE_A Kconfig item for all aarch32 Cortex-A CPUs. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
31 lines
562 B
Plaintext
31 lines
562 B
Plaintext
# Copyright (c) 2016 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config HAS_CMSIS_CORE
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bool
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select HAS_CMSIS_CORE_A if CPU_CORTEX_A
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select HAS_CMSIS_CORE_A if CPU_AARCH32_CORTEX_A
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select HAS_CMSIS_CORE_R if CPU_CORTEX_R
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select HAS_CMSIS_CORE_M if CPU_CORTEX_M
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if HAS_CMSIS_CORE
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config HAS_CMSIS_CORE_A
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bool
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config HAS_CMSIS_CORE_R
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bool
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config HAS_CMSIS_CORE_M
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bool
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endif
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menuconfig CMSIS_DSP
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bool "CMSIS-DSP Library Support"
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depends on (CPU_CORTEX && NEWLIB_LIBC) || ARCH_POSIX
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if CMSIS_DSP
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source "modules/Kconfig.cmsis_dsp"
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endif
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