zephyrproject-rtos/zephyr
0
0
Fork 0
mirror of https://github.com/zephyrproject-rtos/zephyr synced 2025-09-01 23:31:57 +00:00
Code Issues Packages Projects Releases Wiki Activity
2e331de690
zephyr/include/arch/riscv32/common
History
Andrew Boie bd69c3bdf0 riscv32: enable gen_isr_tables mechanism 
Change-Id: Ia09d9a4d3412424dcbb25db829059a0714d81214
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:49:17 +00:00
..
linker.ld riscv32: enable gen_isr_tables mechanism 2017-02-15 04:49:17 +00:00