mirror of
https://github.com/zephyrproject-rtos/zephyr
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519661748e
Defines device tree aliases for on-chip peripherals at the soc level instead of the board level for all kinetis socs. The eliminates some duplicate code in the board level device trees, and will allow drivers to use device-tree generated macros directly instead of through dts fixups. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
237 lines
4.8 KiB
Plaintext
237 lines
4.8 KiB
Plaintext
/* SPDX-License-Identifier: Apache-2.0 */
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#include <arm/armv6-m.dtsi>
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#include <dt-bindings/clock/kinetis_sim.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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aliases {
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adc-0 = &adc0;
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gpio-a = &gpioa;
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gpio-b = &gpiob;
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gpio-c = &gpioc;
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i2c-0 = &i2c0;
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i2c-1 = &i2c1;
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pinmux-a = &pinmux_a;
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pinmux-b = &pinmux_b;
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pinmux-c = &pinmux_c;
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pwm-0 = &pwm0;
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pwm-1 = &pwm1;
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pwm-2 = &pwm2;
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rtc-0 = &rtc0;
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spi-0 = &spi0;
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spi-1 = &spi1;
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uart-0 = &lpuart0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m0+";
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reg = <0>;
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};
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x20000>;
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};
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soc {
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mcg: clock-controller@40064000 {
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compatible = "nxp,kw41z-mcg";
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reg = <0x40064000 0x13>;
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};
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clock-controller@40065000 {
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compatible = "nxp,kw41z-osc";
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reg = <0x40065000 0x4>;
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enable-external-reference;
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};
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rtc0: rtc@4003d000 {
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compatible = "nxp,kinetis-rtc";
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reg = <0x4003d000 0x20>;
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interrupts = <20 0>;
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clock-frequency = <32768>;
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label = "RTC_0";
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prescaler = <32768>;
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};
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sim: sim@40047000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40047000 0x1060>;
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label = "SIM";
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#clock-cells = <3>;
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};
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flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfa";
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label = "FLASH_CTRL";
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reg = <0x40020000 0x2c>;
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interrupts = <5 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "MCUX_FLASH";
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reg = <0 0x80000>;
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erase-block-size = <2048>;
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write-block-size = <4>;
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};
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <8 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <9 0>;
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clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 7>;
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label = "I2C_1";
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status = "disabled";
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};
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lpuart0: lpuart@40054000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40054000 0x18>;
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interrupts = <12 0>;
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clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1038 20>;
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label = "UART_0";
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status = "disabled";
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};
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pinmux_a: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0xa4>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
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};
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pinmux_b: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0xa4>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
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};
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pinmux_c: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0xa4>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff000 0x40>;
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interrupts = <30 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff040 0x40>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff080 0x40>;
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interrupts = <31 2>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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spi0: spi@4002c000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002c000 0x9C>;
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interrupts = <10 3>;
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label = "SPI_0";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@4002d000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002d000 0x9C>;
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interrupts = <29 3>;
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label = "SPI_1";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 13>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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pwm0: pwm@40038000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x40038000 0x88>;
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prescaler = <2>;
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period = <1000>;
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/* channel information needed - fixme */
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};
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pwm1: pwm@40039000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x40039000 0x88>;
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prescaler = <2>;
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period = <1000>;
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/* channel information needed - fixme */
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};
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pwm2: pwm@4003a000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x4003a000 0x88>;
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prescaler = <2>;
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period = <1000>;
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/* channel information needed - fixme */
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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#io-channel-cells = <1>;
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};
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trng: random@40029000 {
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compatible = "nxp,kinetis-trng";
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reg = <0x40029000 0x1000>;
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status = "okay";
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interrupts = <13 0>;
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label = "TRNG";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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