mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-29 21:45:24 +00:00
ec11279645
Adds support for the NXP MIMXRT1050-EVK board, an entry-level development board for the new mimxrt1052 Cortex-M7 SoC. Adds pinmuxing, dts, documentation, and jlink debug support for the new board. Note that pinmuxing uses the mcux pinmux driver directly rather than the Zephyr pinmux interface. The mimxrt1052 SoC has complicated pinmuxing that may require changing the Zephyr pinmux interface to support, so for now let's use the mcux driver directly. We are also not yet configuring the external flash, therefore a debugger is required to load code to the internal sram. The on-board OpenSDA circuit with jlink firmware is sufficient, and the 'make debug' build target is supported. Samples tested include: hello_world, philosophers, synchronization, basic/blinky, and basic/button. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
/*
|
|
* Copyright (c) 2017, NXP
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include <init.h>
|
|
#include <fsl_iomuxc.h>
|
|
|
|
static int mimxrt1050_evk_init(struct device *dev)
|
|
{
|
|
ARG_UNUSED(dev);
|
|
|
|
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
|
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
|
|
|
|
/* LED */
|
|
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
|
|
|
|
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,
|
|
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
|
|
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
|
|
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
|
|
|
|
/* SW0 */
|
|
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
|
|
|
|
#ifdef CONFIG_UART_MCUX_LPUART_1
|
|
/* LPUART1 TX/RX */
|
|
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
|
|
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
|
|
|
|
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX,
|
|
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
|
|
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
|
|
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
|
|
|
|
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX,
|
|
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
|
|
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
|
|
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
SYS_INIT(mimxrt1050_evk_init, PRE_KERNEL_1, 0);
|